H10P 50/73
Etching of wafers, substrates or parts of devices: using masks for insulating
Official title: {using masks for insulating materials}
H10P50/73 (Etching of wafers, substrates or parts of devices: using masks for insulating) appears on 7,031 US grants and 8,069 published applications in this corpus.
Search patents in H10P- Granted patents
- 7,031
- Published applications
- 8,069
- Assignees
- 768
- Inventors
- 10,751
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 2 | 0 |
| 1977 | 1 | 0 |
| 1978 | 5 | 0 |
| 1979 | 1 | 0 |
| 1980 | 0 | 0 |
| 1981 | 3 | 0 |
| 1982 | 3 | 0 |
| 1983 | 3 | 0 |
| 1984 | 6 | 0 |
| 1985 | 7 | 0 |
| 1986 | 2 | 0 |
| 1987 | 5 | 0 |
| 1988 | 3 | 0 |
| 1989 | 3 | 0 |
| 1990 | 5 | 0 |
| 1991 | 14 | 0 |
| 1992 | 17 | 0 |
| 1993 | 12 | 0 |
| 1994 | 12 | 0 |
| 1995 | 10 | 0 |
| 1996 | 7 | 0 |
| 1997 | 19 | 0 |
| 1998 | 25 | 0 |
| 1999 | 50 | 0 |
| 2000 | 64 | 0 |
| 2001 | 104 | 57 |
| 2002 | 124 | 109 |
| 2003 | 120 | 130 |
| 2004 | 114 | 165 |
| 2005 | 100 | 189 |
| 2006 | 124 | 179 |
| 2007 | 111 | 202 |
| 2008 | 124 | 258 |
| 2009 | 125 | 230 |
| 2010 | 159 | 167 |
| 2011 | 158 | 165 |
| 2012 | 187 | 208 |
| 2013 | 210 | 195 |
| 2014 | 215 | 309 |
| 2015 | 320 | 536 |
| 2016 | 488 | 554 |
| 2017 | 565 | 476 |
| 2018 | 434 | 457 |
| 2019 | 484 | 527 |
| 2020 | 547 | 584 |
| 2021 | 426 | 441 |
| 2022 | 342 | 423 |
| 2023 | 279 | 430 |
| 2024 | 308 | 426 |
| 2025 | 371 | 402 |
| 2026 | 213 | 250 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Assembly structure including a plurality of spacers and method of manufacturing the same6 Oct 2026US 12,757,375 B2Nanya Technology Corporation
- Method of manufacturing memory device6 Oct 2026US 12,757,394 B2Winbond Electronics Corp.
- Methods for reducing photoresist and carbon etch rates in an ICP process chamber using a silicon-based chamber pre-coat6 Oct 2026US 12,757,659 B2APPLIED Materials.Inc.
- Method for etching an etch layer6 Oct 2026US 12,757,660 B2Lam Research Corporation
- Semiconductor device, semiconductor structure and method for fabricating semiconductor device and semiconductor structure using tilted etch process6 Oct 2026US 12,757,661 B2Nanya Technology Corporation
- Resist underlayer film-forming composition8 Oct 2026US 2026/0310081 A1Nissan Chemical Corporation
- Lithography method8 Oct 2026US 2026/0310082 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Method for forming semiconductor device structure with protection layer8 Oct 2026US 2026/0313937 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Methods and systems for dry etching8 Oct 2026US 2026/0314324 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Method for forming patterned mask on substrate8 Oct 2026US 2026/0314340 A1Tokyo Electron Limited
Most cited
By later US patents
- Method of spacer patterning to form a target integrated circuit pattern3,272US 9,576,814 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2017
- Method for depositing an amorphous carbon layer1,124US 6,573,030 B1APPLIED Materials.Inc. · 2003
- Frequency doubling using spacer mask774US 7,807,578 B2APPLIED Materials.Inc. · 2010
- Single spacer process for multiplying pitch by a factor greater than two and related intermediate IC structures742US 7,611,980 B2Micron Technology, Inc. · 2009
- Dry etching by alternately etching and depositing567US 4,985,114 AHitachi, Ltd. · 1991