H10D 84/0174
The gate conductors being silicided
Official title: {the gate conductors being silicided}
H10D84/0174 (The gate conductors being silicided) appears on 684 US grants and 721 published applications in this corpus.
Search patents in H10D- Granted patents
- 684
- Published applications
- 721
- Assignees
- 158
- Inventors
- 1,197
- Latest grant
- 2 Jun 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1984 | 2 | 0 |
| 1985 | 2 | 0 |
| 1986 | 0 | 0 |
| 1987 | 2 | 0 |
| 1988 | 3 | 0 |
| 1989 | 4 | 0 |
| 1990 | 4 | 0 |
| 1991 | 6 | 0 |
| 1992 | 2 | 0 |
| 1993 | 2 | 0 |
| 1994 | 2 | 0 |
| 1995 | 3 | 0 |
| 1996 | 5 | 0 |
| 1997 | 10 | 0 |
| 1998 | 10 | 0 |
| 1999 | 18 | 0 |
| 2000 | 23 | 0 |
| 2001 | 16 | 8 |
| 2002 | 22 | 24 |
| 2003 | 29 | 25 |
| 2004 | 23 | 35 |
| 2005 | 28 | 81 |
| 2006 | 51 | 82 |
| 2007 | 43 | 89 |
| 2008 | 50 | 93 |
| 2009 | 48 | 64 |
| 2010 | 68 | 39 |
| 2011 | 39 | 46 |
| 2012 | 31 | 20 |
| 2013 | 29 | 19 |
| 2014 | 22 | 15 |
| 2015 | 22 | 17 |
| 2016 | 14 | 14 |
| 2017 | 4 | 2 |
| 2018 | 5 | 9 |
| 2019 | 13 | 6 |
| 2020 | 6 | 8 |
| 2021 | 6 | 7 |
| 2022 | 3 | 5 |
| 2023 | 2 | 6 |
| 2024 | 5 | 3 |
| 2025 | 5 | 3 |
| 2026 | 2 | 1 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Fabrication of gate-all-around integrated circuit structures having additive gate structures2 Jun 2026US 12,648,180 B2Intel Corporation
- CMOS architecture with thermally stable silicide gate workfunction metal10 Mar 2026US 12,575,184 B2Intel Corporation
- Integrated assemblies having transistors configured for high-voltage applications, and methods of forming integrated assemblies2 Dec 2025US 12,490,452 B2Micron Technology, Inc.
- High voltage field effect transistors with different sidewall spacer configurations and method of making the same28 Oct 2025US 12,457,786 B2SanDisk Technologies LLC
- FUSI gated device formation7 Oct 2025US 12,439,679 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Integrated Assemblies having Transistors Configured for High-Voltage Applications, and Methods of Forming Integrated Assemblies5 Mar 2026US 2026/0068214 A1Micron Technology, Inc.
- Method for forming semiconductor structure2 Oct 2025US 2025/0311357 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same20 Mar 2025US 2025/0098281 A1Renesas Electronics Corporation
- High voltage field effect transistors with different sidewall spacer configurations and method of making the same30 Jan 2025US 2025/0040217 A1Western Digital Technologies, Inc.
- Dual silicide process using ruthenium silicide5 Dec 2024US 2024/0404888 A1Applied Materuals, Inc.
Most cited
By later US patents
- Method to increase tensile stress of silicon nitride films using a post PECVD deposition UV cure496US 8,129,290 B2APPLIED Materials.Inc. · 2012
- Device structure and method for reducing silicide encroachment232US 6,765,273 B1Intel Corporation · 2004
- CMOS self-aligned strapped interconnection199US 6,388,296 B1Sharp Laboratories of America, Inc. · 2002
- Structure and method to improve channel mobility by gate electrode stress modification179US 6,977,194 B2International Business Machines Corporation · 2005
- SRAM with local interconnect173US 4,975,756 ATexas Instruments Incorporated · 1990