CMOS architecture with thermally stable silicide gate workfunction metal

An integrated circuit structure, comprising:

• a first nanoribbon;
• a second nanoribbon above the first nanoribbon, wherein the first and second nanoribbons are separated from one another by insulator material;
• a first gate structure around the first nanoribbon, the first gate structure including a first gate electrode and a first high-k gate dielectric between the first gate electrode and the first nanoribbon, the first gate electrode including a first conductive layer, a second conductive layer, and a third conductive layer, the first conductive layer comprising a compound of silicon and one or more first metals, and the second conductive layer comprising one or more second metals, wherein a topmost surface of the first conductive layer is lower than a topmost surface of the second conductive layer, such that the second conductive layer extends over and contacts the topmost surface of the first conductive layer, and wherein the third conductive layer includes first and second non-contiguous portions, the first non-contiguous portion directly contacting both the first conductive layer and a first sidewall portion of the first high-k gate dielectric, and the second non-contiguous portion directly contacting both the first conductive layer and a second sidewall portion of the first high-k gate dielectric that is opposite from the first sidewall portion;
• and
• a second gate structure around the second nanoribbon, the second gate structure including a second gate electrode and a second high-k gate dielectric between the second gate electrode and the second nanoribbon.

An integrated circuit, comprising:

• a first semiconductor body;
• a second semiconductor body above the first semiconductor body, wherein the first and second semiconductor bodies are separated from one another by insulator material;
• a first gate structure on the first semiconductor body, the first gate structure including a first gate electrode and a first high-k gate dielectric between the first gate electrode and the first semiconductor body, the first gate electrode including a first conductive layer, a second conductive layer, and a conductive fill, wherein the first conductive layer comprises a compound of silicon and one or more first metals, and wherein the conductive fill is on the first conductive layer and comprises one or more second metals different from the one or more first metals, and wherein the second conductive layer includes first and second non-contiguous portions, the first non-contiguous portion directly contacting both the first conductive layer and a first sidewall portion of the first high-k gate dielectric, and the second non-contiguous portion directly contacting both the first conductive layer and a second sidewall portion of the first high-k gate dielectric that is opposite from the first sidewall portion;
• and
• a second gate structure on the second semiconductor body, the second gate structure including a second gate electrode and a second high-k gate dielectric between the second gate electrode and the second semiconductor body.