H05K 3/4661
Adding a circuit layer by direct wet plating
Official title: {Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor (other insulating materials H05K3/387)}
H05K3/4661 (Adding a circuit layer by direct wet plating) appears on 451 US grants and 465 published applications in this corpus.
Search patents in H05K- Granted patents
- 451
- Published applications
- 465
- Assignees
- 158
- Inventors
- 976
- Latest grant
- 18 Aug 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 1 | 0 |
| 1978 | 0 | 0 |
| 1979 | 1 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 1 | 0 |
| 1983 | 0 | 0 |
| 1984 | 1 | 0 |
| 1985 | 2 | 0 |
| 1986 | 3 | 0 |
| 1987 | 3 | 0 |
| 1988 | 7 | 0 |
| 1989 | 2 | 0 |
| 1990 | 8 | 0 |
| 1991 | 2 | 0 |
| 1992 | 9 | 0 |
| 1993 | 7 | 0 |
| 1994 | 4 | 0 |
| 1995 | 4 | 0 |
| 1996 | 6 | 0 |
| 1997 | 4 | 0 |
| 1998 | 7 | 0 |
| 1999 | 11 | 0 |
| 2000 | 8 | 0 |
| 2001 | 16 | 6 |
| 2002 | 11 | 18 |
| 2003 | 16 | 12 |
| 2004 | 13 | 15 |
| 2005 | 8 | 22 |
| 2006 | 6 | 11 |
| 2007 | 8 | 31 |
| 2008 | 12 | 22 |
| 2009 | 11 | 33 |
| 2010 | 19 | 14 |
| 2011 | 22 | 20 |
| 2012 | 21 | 21 |
| 2013 | 14 | 14 |
| 2014 | 7 | 19 |
| 2015 | 20 | 28 |
| 2016 | 20 | 13 |
| 2017 | 12 | 10 |
| 2018 | 11 | 10 |
| 2019 | 16 | 23 |
| 2020 | 10 | 20 |
| 2021 | 17 | 12 |
| 2022 | 13 | 30 |
| 2023 | 13 | 22 |
| 2024 | 22 | 24 |
| 2025 | 13 | 9 |
| 2026 | 9 | 6 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Printed wiring board18 Aug 2026US 12,713,538 B2Ibiden Co., Ltd.
- Package substrate26 May 2026US 12,642,116 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Laser processing method and circuit board manufacturing method19 May 2026US 12,635,083 B2Gigaphoton Inc.
- Method of manufacturing circuit board12 May 2026US 12,628,282 B2Avary Holding (Shenzhen) Co., Limited.
- Wiring substrate12 May 2026US 12,628,283 B2Ibiden Co., Ltd.
- Glass Barrier Layer Product, and Manufacture Method30 Jul 2026US 2026/0223288 A1AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
- Method for forming blind vias and method for manufacturing packaging substrate2 Jul 2026US 2026/0190241 A1Absolics Inc.
- Method for producing printed wiring board, photosensitive resin composition, photosensitive resin film, printed wiring board, and semiconductor package2 Jul 2026US 2026/0190248 A1Resonac Corporation
- Packaging substrate and manufacture method for the same25 Jun 2026US 2026/0182419 A1Absolics Inc.
- Printed circuit board16 Apr 2026US 2026/0107379 A1Samsung Electro-Mechanics Co., Ltd.
Most cited
By later US patents
- Electroless CU deposition on a barrier layer by CU contact displacement for ULSI applications448US 5,891,513 ACornell Research Foundation, Inc. · 1999
- Selective plating method for forming integral via and wiring layers210US 5,209,817 AInternational Business Machines Corporation · 1993
- Methods of forming channels and vias in insulating layers187US 5,173,442 AMicroelectronics and Computer Technology Corporation · 1992
- Structure having laser ablated features and method of fabricating179US 6,730,857 B2International Business Machines Corporation · 2004
- Multilayer printed-circuit board and semiconductor device174US 6,534,723 B1Ibiden Co., Ltd. · 2003