Selective plating method for forming integral via and wiring layers

A method of fabricating wiring and via conductors comprising:

• a. forming a via opening in a first dielectric layer extending from an upper surface of the dielectric layer through said dielectric layer with said dielectric layer forming a wall of said via;
• b. forming a thin conductive seed layer over the upper surface of said dielectric layer and the wall defining said via opening;
• c. forming a masking layer on said seed layer;
• d. forming openings in said masking layer that expose said seed layer in the wall of the via opening and in a desired wiring pattern;
• e. electroplating conductive material onto the exposed portions of said seed layer so that isotropic deposition of said conductive material fills said via opening in said dielectric layer with the upper surface of the conductive material that fills said via opening co-planar with the upper surface of the conductive material in said wiring pattern;
• f. removing said dielectric masking layer;
• and
• g. coating the assembly of set forth in paragraph e with a second dielectric layer and repeating the steps a through e to form a second wiring and via conductive layer.

A method of fabricating wiring and via conductors comprising:

• forming a via opening in a dielectric layer extending from an upper surface of the dielectric layer through said dielectric layer with said dielectric layer forming a wall of said via opening;
• forming a wiring pattern opening in said dielectric layer extending from said upper surface of the dielectric layer through the dielectric layer with the dielectric layer forming a wall of said wiring pattern opening;
• forming a thin conductive seed layer over the upper surface of said dielectric layer, over the via opening including the wall defining said via opening, and over the wiring pattern opening including the wall defining the wire pattern opening;
• removing said conductive seed layer from said upper surface of said dielectric layer, from the wall defining said via opening, and from the wall defining said wire pattern opening;
• electrolessly plating conductive material onto the remaining portions of said seed layer so that isotropic deposition of said conductive material fills said via opening and said wire pattern openings in said dielectric layer with the upper surface of the conductive material that fills said via opening co-planar with the upper surface of the conductive material that fills said wiring pattern openings.