G11C 29/006
At wafer scale level, i.e. wafer scale integration [wsi]
Official title: {at wafer scale level, i.e. wafer scale integration [WSI]}
G11C29/006 (At wafer scale level, i.e. wafer scale integration [wsi]) appears on 657 US grants and 554 published applications in this corpus.
Search patents in G11C- Granted patents
- 657
- Published applications
- 554
- Assignees
- 213
- Inventors
- 1,142
- Latest grant
- 14 Jul 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 1 | 0 |
| 1977 | 4 | 0 |
| 1978 | 1 | 0 |
| 1979 | 0 | 0 |
| 1980 | 2 | 0 |
| 1981 | 2 | 0 |
| 1982 | 3 | 0 |
| 1983 | 0 | 0 |
| 1984 | 3 | 0 |
| 1985 | 3 | 0 |
| 1986 | 0 | 0 |
| 1987 | 3 | 0 |
| 1988 | 4 | 0 |
| 1989 | 10 | 0 |
| 1990 | 17 | 0 |
| 1991 | 10 | 0 |
| 1992 | 10 | 0 |
| 1993 | 7 | 0 |
| 1994 | 8 | 0 |
| 1995 | 6 | 0 |
| 1996 | 9 | 0 |
| 1997 | 14 | 0 |
| 1998 | 11 | 0 |
| 1999 | 6 | 0 |
| 2000 | 6 | 0 |
| 2001 | 10 | 6 |
| 2002 | 24 | 24 |
| 2003 | 22 | 33 |
| 2004 | 30 | 39 |
| 2005 | 33 | 41 |
| 2006 | 31 | 22 |
| 2007 | 25 | 29 |
| 2008 | 21 | 26 |
| 2009 | 23 | 16 |
| 2010 | 25 | 5 |
| 2011 | 12 | 13 |
| 2012 | 9 | 16 |
| 2013 | 10 | 15 |
| 2014 | 16 | 11 |
| 2015 | 13 | 11 |
| 2016 | 11 | 10 |
| 2017 | 10 | 6 |
| 2018 | 8 | 10 |
| 2019 | 15 | 17 |
| 2020 | 25 | 45 |
| 2021 | 34 | 42 |
| 2022 | 39 | 43 |
| 2023 | 30 | 25 |
| 2024 | 20 | 15 |
| 2025 | 16 | 17 |
| 2026 | 5 | 17 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Storage device for supporting dynamic allocation of memory and method of operating the same14 Jul 2026US 12,682,975 B2SK hynix Inc.
- Methods for fabricating 3D memory devices and structures with memory arrays and metal layers9 Jun 2026US 12,653,021 B2Monolithic 3D Inc.
- Methods for optimizing semiconductor device placement on a substrate for improved performance, and associated systems and methods12 May 2026US 12,626,731 B2Micron Technology, Inc.
- Recovery operation applying a recovery voltage via wake-up pulse for increasing a residual polarization of memory cells21 Apr 2026US 12,608,135 B2SK hynix Inc.
- Magnet configuration systems and methods to detect magnetic tunnel junction coercivity weak bits in MRAM chips6 Jan 2026US 12,517,194 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Memory device, memory device including memory die stack, and wafer-level testing method for semiconductor chip1 Oct 2026US 2026/0301833 A1Samsung Electronics Co., Ltd.
- Method, system, device, and storage medium for determining wck-on value of lpddr chip30 Jul 2026US 2026/0221212 A1Shenzhen Rayson Technology Co., Ltd.
- Memory system for detecting fault in signal transmission path23 Jul 2026US 2026/0212944 A1SK hynix Inc.
- Stacked memory assembly with failure detection and repair4 Jun 2026US 2026/0155192 A1SanDisk Technologies LLC
- Silicon Wafer-Scale System, Repair Method Thereof, and Electronic Device7 May 2026US 2026/0129998 A1Huawei Technologies Co., Ltd.
Most cited
By later US patents
- Redundancy analysis for embedded memories with built-in self test and built-in self repair308US 6,067,262 ALSI Logic Corporation · 2000
- Making and testing an integrated circuit using high density probe points307US 5,103,557 A1992
- Lithography device for semiconductor circuit pattern generator287US 7,242,012 B2Elm Technology Corporation · 2007
- Method of making a flexible tester surface for testing integrated circuits253US 5,020,219 A1991
- Membrane dielectric isolation IC fabrication247US 5,354,695 A1994