G11C 2211/5644
Multilevel memory comprising counting devices
G11C2211/5644 (Multilevel memory comprising counting devices) appears on 297 US grants and 262 published applications in this corpus.
Search patents in G11C- Granted patents
- 297
- Published applications
- 262
- Assignees
- 73
- Inventors
- 449
- Latest grant
- 16 Jun 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1991 | 1 | 0 |
| 1992 | 2 | 0 |
| 1993 | 4 | 0 |
| 1994 | 1 | 0 |
| 1995 | 1 | 0 |
| 1996 | 6 | 0 |
| 1997 | 3 | 0 |
| 1998 | 14 | 0 |
| 1999 | 10 | 0 |
| 2000 | 6 | 0 |
| 2001 | 3 | 1 |
| 2002 | 4 | 2 |
| 2003 | 4 | 2 |
| 2004 | 1 | 3 |
| 2005 | 1 | 1 |
| 2006 | 1 | 0 |
| 2007 | 0 | 3 |
| 2008 | 0 | 7 |
| 2009 | 6 | 9 |
| 2010 | 9 | 7 |
| 2011 | 5 | 12 |
| 2012 | 13 | 9 |
| 2013 | 12 | 18 |
| 2014 | 13 | 3 |
| 2015 | 7 | 7 |
| 2016 | 13 | 17 |
| 2017 | 15 | 14 |
| 2018 | 9 | 8 |
| 2019 | 16 | 31 |
| 2020 | 27 | 23 |
| 2021 | 22 | 27 |
| 2022 | 19 | 26 |
| 2023 | 21 | 17 |
| 2024 | 20 | 6 |
| 2025 | 6 | 5 |
| 2026 | 2 | 4 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Pattern analysis enabled read operation in nand component16 Jun 2026US 12,658,266 B2SK hynix Inc.
- Method and apparatus for reading data stored in flash memory by referring to binary digit distribution characteristics of bit sequences read from flash memory2 Jun 2026US 12,646,570 B2Silicon Motion, Inc.
- Counter-based methods and systems for accessing memory cells11 Nov 2025US 12,468,450 B2Micron Technology, Inc.
- Read offset compensation in read operation of memory device23 Sep 2025US 12,424,285 B2Yangtze Memory Technologies Co., Ltd.
- Method of programming multi-plane memory device1 Jul 2025US 12,347,501 B2Yangtze Memory Technologies Co., Ltd.
- Method and apparatus for reading data stored in flash memory by referring to binary digit distribution characteristics of bit sequences read from flash memory17 Sep 2026US 2026/0279460 A1Silicon Motion, Inc.
- Method and apparatus for reading data stored in flash memory by referring to binary digit distribution characteristics of bit sequences read from flash memory17 Sep 2026US 2026/0279461 A1Silicon Motion, Inc.
- Counter-based methods and systems for accessing memory cells5 Mar 2026US 2026/0064283 A1Micron Technology, Inc.
- Counter with low memory demand5 Feb 2026US 2026/0037354 A1NXP B. V.
- Read offset compensation in read operation of memory device4 Dec 2025US 2025/0372181 A1Yangtze Memory Technologies Co., Ltd.
Most cited
By later US patents
- Highly compact EPROM and flash EEPROM devices819US 5,095,344 A1992
- Flash EEPROM memory systems having multistate storage cells579US 5,043,940 A1991
- Method circuit and system for read error detection in a non-volatile memory array317US 6,992,932 B2Saifun Semiconductors Ltd. · 2006
- Multi-state flash EEPROM system using incremental programing and erasing methods293US 5,293,560 A1994
- Flash EEPROM system cell array with more than two storage states per memory cell293US 5,434,825 A1995