Read offset compensation in read operation of memory device
AssigneeYangtze Memory Technologies Co., Ltd.
InventorHua Tan
Life of this patent
Estimating the term…
Abstract
A memory controller coupled to a memory device including an array of memory cells, each memory cell being set to one of 2N states corresponding to a piece of N-bits data, where N is an integer greater than 1, and the array of memory cells being partitioned into one or more units. The memory controller is coupled to the memory device and configured to, upon executing instructions, obtain, from the memory device, a number P of memory cells in a unit of the units that are in one or more programmed states of the 2N states; calculate, based on the number P, a compensated read voltage with an offset from a default read voltage; and provide, to the memory device, the compensated read voltage for a read operation performed on a selected memory cell of the memory cells in a unit of the units.
Claims20
A memory system, comprising:
- a memory device comprising:
- an array of memory cells, each memory cell of the array being configured to be set to one of 2N states corresponding to a piece of N-bit data, where N is an integer greater than 1, and the array of memory cells is partitioned into one or more units, and
- a peripheral circuit coupled to the memory cells and configured to perform a read operation on a selected memory cell of the memory cells in a unit of the one or more units;
- and
- a memory controller coupled to the memory device and configured to:
- determine a voltage offset based on a first mapping table containing values of a number P of memory cells in the unit of the one or more units that are in one or more programmed states of the 2N states and values of the voltage offset corresponding to the values of the number P, and
- control the memory device to perform the read operation using a compensated read voltage with the voltage offset from a default read voltage by sending instructions to the peripheral circuit.
A memory controller, coupled to a memory device comprising an array of memory cells, each memory cell of the array being set to one of 2N states corresponding to a piece of N-bits data, where N is an integer greater than 1, and the array of memory cells being partitioned into one or more units, wherein the memory controller is coupled to the memory device and configured to, upon executing instructions:
- obtain, from the memory device, a number P of memory cells in a unit of the one or more units that are in one or more programmed states of the 2N states;
- determine a voltage offset corresponding to the number P through a look up operation based on a first mapping table containing values of a number of memory cells in the unit that are in one or more programmed states of the 2N states and values of the voltage offset corresponding to the values of the number P;
- calculate, based on the number P, a compensated read voltage with the voltage offset from a default read voltage;
- and
- provide, to the memory device, the compensated read voltage for a read operation performed on a selected memory cell of the memory cells in a unit of the one or more units.
A method for reading a memory device comprising an array of memory cells being configured to be set to one of 2N states corresponding to a piece of N-bit data, where N is an integer greater than 1, the array of memory cells being partitioned into one or more units, the method comprising:
- obtaining a number P of memory cells in a unit of the one or more units that are in one or more programmed states of the 2N states;
- determining a voltage offset corresponding to the number P through a look up operation based on a first mapping table containing values of a number of memory cells in the unit of the one or more units that are in one or more programmed states of the 2N states and values of the voltage offset corresponding to the values of the number P;
- calculating a compensated read voltage with the voltage offset from a default read voltage;
- and
- performing a read operation with the compensated read voltage on a selected memory cell of the memory cells in the unit of the one or more units.
Dependencies are inferred from the claim text.