G11C 16/0425
Comprising cells containing a merged floating gate and select transistor
Official title: {comprising cells containing a merged floating gate and select transistor}
G11C16/0425 (Comprising cells containing a merged floating gate and select transistor) appears on 810 US grants and 708 published applications in this corpus.
Search patents in G11C- Granted patents
- 810
- Published applications
- 708
- Assignees
- 204
- Inventors
- 941
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1978 | 2 | 0 |
| 1979 | 1 | 0 |
| 1980 | 0 | 0 |
| 1981 | 1 | 0 |
| 1982 | 6 | 0 |
| 1983 | 4 | 0 |
| 1984 | 1 | 0 |
| 1985 | 1 | 0 |
| 1986 | 2 | 0 |
| 1987 | 0 | 0 |
| 1988 | 2 | 0 |
| 1989 | 4 | 0 |
| 1990 | 4 | 0 |
| 1991 | 11 | 0 |
| 1992 | 7 | 0 |
| 1993 | 8 | 0 |
| 1994 | 11 | 0 |
| 1995 | 6 | 0 |
| 1996 | 10 | 0 |
| 1997 | 6 | 0 |
| 1998 | 11 | 0 |
| 1999 | 17 | 0 |
| 2000 | 22 | 0 |
| 2001 | 23 | 8 |
| 2002 | 19 | 14 |
| 2003 | 23 | 19 |
| 2004 | 21 | 31 |
| 2005 | 22 | 36 |
| 2006 | 23 | 29 |
| 2007 | 21 | 27 |
| 2008 | 26 | 17 |
| 2009 | 20 | 13 |
| 2010 | 12 | 12 |
| 2011 | 13 | 16 |
| 2012 | 12 | 15 |
| 2013 | 19 | 32 |
| 2014 | 25 | 19 |
| 2015 | 26 | 24 |
| 2016 | 43 | 31 |
| 2017 | 18 | 19 |
| 2018 | 26 | 33 |
| 2019 | 42 | 51 |
| 2020 | 49 | 55 |
| 2021 | 37 | 52 |
| 2022 | 46 | 48 |
| 2023 | 31 | 41 |
| 2024 | 34 | 26 |
| 2025 | 30 | 11 |
| 2026 | 12 | 29 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Address fault detection in a memory system6 Oct 2026US 12,755,788 B2Silicon Storage Technology, Inc.
- Testing circuitry and methods for analog neural memory in artificial neural network30 Jun 2026US 12,670,376 B2Silicon Storage Technology, Inc.
- Output circuit for analog neural memory in a deep learning artificial neural network26 May 2026US 12,639,001 B2Silicon Storage Technology, Inc.
- Calibration of electrical parameters in a deep learning artificial neural network26 May 2026US 12,639,559 B2Silicon Storage Technology, Inc.
- Determination of a bias voltage by applying a series of increasing currents to bit line of memory cell in a neural network26 May 2026US 12,640,197 B2Silicon Storage Technology, Inc.
- Calibration of electrical parameters in a deep learning artificial neural network17 Sep 2026US 2026/0278360 A1Silicon Storage Technology, Inc.
- Determination of a bias voltage to apply to one or more memory cells10 Sep 2026US 2026/0268970 A1Silicon Storage Technology, Inc.
- Program refresh for non-volatile memory array in a semiconductor device20 Aug 2026US 2026/0245624 A1Silicon Storage Technology, Inc.
- Flash and method for controlling program voltage of same23 Jul 2026US 2026/0212930 A1Shanghai Huahong Grace Semiconductor Manufacturing Corporation
- Non-volatile memory integrated circuit and corresponding manufacturing method23 Jul 2026US 2026/0214894 A1STMicroelectronics International N. V.
Most cited
By later US patents
- Multi-state memory1,008US 6,222,762 B1SanDisk Corporation · 2001
- Highly compact EPROM and flash EEPROM devices819US 5,095,344 A1992
- Flash EEPROM memory systems having multistate storage cells579US 5,043,940 A1991
- Single transistor non-valatile electrically alterable semiconductor memory device474US 5,029,130 ASilicon Storage Technology, Inc. · 1991
- Flash memory cells with separated self-aligned select and erase gates, and process of fabrication314US 6,747,310 B2Actrans System Inc. · 2004