G06F 9/38885
Divergence aspects
Official title: {Divergence aspects}
G06F9/38885 (Divergence aspects) appears on 143 US grants and 180 published applications in this corpus.
Search patents in G06F- Granted patents
- 143
- Published applications
- 180
- Assignees
- 21
- Inventors
- 381
- Latest grant
- 15 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 2008 | 2 | 0 |
| 2009 | 4 | 0 |
| 2010 | 2 | 1 |
| 2011 | 2 | 4 |
| 2012 | 3 | 5 |
| 2013 | 2 | 7 |
| 2014 | 5 | 6 |
| 2015 | 1 | 10 |
| 2016 | 6 | 7 |
| 2017 | 12 | 6 |
| 2018 | 15 | 9 |
| 2019 | 8 | 14 |
| 2020 | 14 | 13 |
| 2021 | 8 | 18 |
| 2022 | 12 | 22 |
| 2023 | 11 | 18 |
| 2024 | 14 | 7 |
| 2025 | 16 | 21 |
| 2026 | 6 | 12 |
By publication year. 2026 runs to 8 Oct.
Recent patents
- Streaming wave coalescer circuit15 Sep 2026US 12,737,190 B2Advanced Micro Devices, Inc.
- Chiplet-integrated machine learning accelerators1 Sep 2026US 12,724,732 B2Advanced Micro Devices, Inc.
- Hierarchical thread scheduling based on multi-parameter signal barriers25 Aug 2026US 12,717,582 B2Intel Corporation
- Implementing specialized floating point instructions on an integer pipeline for accelerating dynamic programming algorithms17 Feb 2026US 12,554,493 B2NVIDIA Corporation
- Efficient execution of atomic instructions for single instruction, multiple thread (SIMT) architectures10 Feb 2026US 12,547,413 B2NVIDIA Corporation
- Chiplet-integrated machine learning accelerators24 Sep 2026US 2026/0288661 A1Advanced Micro Devices, Inc.
- Preventing performance of conditional instructions9 Jul 2026US 2026/0195131 A1NVIDIA Corporation
- Enabling performance of conditional instructions9 Jul 2026US 2026/0195139 A1NVIDIA Corporation
- Variable register threads with non-contiguous allocations9 Jul 2026US 2026/0195844 A1Intel Corporation
- Broadcast translation lookaside buffer invalidation2 Jul 2026US 2026/0186784 A1
Most cited
By later US patents
- Execution of parallel groups of threads with per-instruction serialization97US 7,634,637 B1NVIDIA Corporation · 2009
- Synchronization of threads in a cooperative thread array93US 7,788,468 B1NVIDIA Corporation · 2010
- Parallel data processing systems and methods using cooperative thread arrays and SIMD instruction issue69US 7,584,342 B1NVIDIA Corporation · 2009
- Managing state information for a multi-threaded processor68US 8,074,224 B1NVIDIA Corporation · 2011
- System and method for managing divergent threads in a SIMD architecture62US 7,353,369 B1NVIDIA Corporation · 2008