G06F 9/3885
Using a plurality of independent parallel functional units
Official title: {using a plurality of independent parallel functional units}
G06F9/3885 (Using a plurality of independent parallel functional units) appears on 5,638 US grants and 5,629 published applications in this corpus.
Search patents in G06F- Granted patents
- 5,638
- Published applications
- 5,629
- Assignees
- 904
- Inventors
- 7,961
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 3 | 0 |
| 1977 | 0 | 0 |
| 1978 | 4 | 0 |
| 1979 | 3 | 0 |
| 1980 | 1 | 0 |
| 1981 | 4 | 0 |
| 1982 | 1 | 0 |
| 1983 | 2 | 0 |
| 1984 | 10 | 0 |
| 1985 | 7 | 0 |
| 1986 | 12 | 0 |
| 1987 | 8 | 0 |
| 1988 | 20 | 0 |
| 1989 | 14 | 0 |
| 1990 | 23 | 0 |
| 1991 | 19 | 0 |
| 1992 | 26 | 0 |
| 1993 | 23 | 0 |
| 1994 | 30 | 0 |
| 1995 | 43 | 0 |
| 1996 | 73 | 0 |
| 1997 | 78 | 0 |
| 1998 | 141 | 0 |
| 1999 | 129 | 0 |
| 2000 | 117 | 0 |
| 2001 | 105 | 31 |
| 2002 | 85 | 109 |
| 2003 | 79 | 122 |
| 2004 | 88 | 187 |
| 2005 | 97 | 149 |
| 2006 | 130 | 172 |
| 2007 | 112 | 187 |
| 2008 | 151 | 265 |
| 2009 | 128 | 205 |
| 2010 | 194 | 141 |
| 2011 | 169 | 167 |
| 2012 | 152 | 139 |
| 2013 | 155 | 175 |
| 2014 | 166 | 243 |
| 2015 | 194 | 216 |
| 2016 | 213 | 222 |
| 2017 | 262 | 292 |
| 2018 | 237 | 286 |
| 2019 | 275 | 282 |
| 2020 | 291 | 382 |
| 2021 | 308 | 349 |
| 2022 | 332 | 290 |
| 2023 | 291 | 287 |
| 2024 | 279 | 232 |
| 2025 | 231 | 234 |
| 2026 | 123 | 265 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Dataflow-based general-purpose processor architectures with feedforward register lanes6 Oct 2026US 12,754,739 B2The Board of Trustees of the University of Illinois
- Cache structure and utilization6 Oct 2026US 12,754,876 B2Intel Corporation
- In-flight incremental processing6 Oct 2026US 12,756,768 B2Intel Corporation
- Systems, methods, and apparatuses for heterogeneous computing29 Sep 2026US 12,748,618 B2Intel Corporation
- Efficient selection of single instruction multiple data operations for neural processing units29 Sep 2026US 12,748,723 B2Tesla, Inc.
- Multiple instruction multiple data processing unit8 Oct 2026US 2026/0310467 A1Abaxor Engineering GmbH
- Performing frequency allocation in parallel8 Oct 2026US 2026/0312700 A1NVIDIA Corporation
- Efficient matrix multiply and add with a group of warps1 Oct 2026US 2026/0299943 A1NVIDIA Corporation
- System and method for implementing quires using a memory controller1 Oct 2026US 2026/0299945 A1Tactical Computing Laboratories, LLC
- Circuitry for Accelerating Processing of Artificial Intelligence Models1 Oct 2026US 2026/0299959 A1Numenta, Inc.
Most cited
By later US patents
- Packet processing system including a policy engine having a classification unit624US 6,157,955 AIntel Corporation · 2000
- Method and system for efficient matrix multiplication in a SIMD processor architecture531US 7,873,812 B12011
- Vector processor system420US 8,356,144 B22013
- Processing array data on SIMD multi-core processor architectures418US 8,484,276 B2International Business Machines Corporation · 2013
- Active memory data compression system and method418US 9,015,390 B2Micron Technology, Inc. · 2015