G06F 9/38
Concurrent instruction execution
Official title: Concurrent instruction execution, e.g. pipeline or look ahead
G06F9/38 (Concurrent instruction execution) appears on 20,335 US grants and 18,439 published applications in this corpus.
Search patents in G06F- Granted patents
- 20,335
- Published applications
- 18,439
- Assignees
- 2,082
- Inventors
- 21,947
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 13 | 0 |
| 1977 | 7 | 0 |
| 1978 | 15 | 0 |
| 1979 | 10 | 0 |
| 1980 | 17 | 0 |
| 1981 | 20 | 0 |
| 1982 | 18 | 0 |
| 1983 | 16 | 0 |
| 1984 | 26 | 0 |
| 1985 | 28 | 0 |
| 1986 | 44 | 0 |
| 1987 | 50 | 0 |
| 1988 | 70 | 0 |
| 1989 | 78 | 0 |
| 1990 | 80 | 0 |
| 1991 | 84 | 0 |
| 1992 | 110 | 0 |
| 1993 | 121 | 0 |
| 1994 | 149 | 0 |
| 1995 | 209 | 0 |
| 1996 | 282 | 0 |
| 1997 | 320 | 0 |
| 1998 | 641 | 0 |
| 1999 | 565 | 0 |
| 2000 | 494 | 0 |
| 2001 | 486 | 131 |
| 2002 | 396 | 452 |
| 2003 | 398 | 521 |
| 2004 | 418 | 689 |
| 2005 | 411 | 567 |
| 2006 | 496 | 593 |
| 2007 | 433 | 545 |
| 2008 | 484 | 727 |
| 2009 | 445 | 619 |
| 2010 | 568 | 474 |
| 2011 | 553 | 470 |
| 2012 | 465 | 494 |
| 2013 | 489 | 618 |
| 2014 | 519 | 812 |
| 2015 | 576 | 740 |
| 2016 | 865 | 755 |
| 2017 | 784 | 814 |
| 2018 | 740 | 784 |
| 2019 | 869 | 1017 |
| 2020 | 984 | 1280 |
| 2021 | 1112 | 1201 |
| 2022 | 1132 | 1064 |
| 2023 | 1054 | 930 |
| 2024 | 939 | 809 |
| 2025 | 776 | 699 |
| 2026 | 476 | 634 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
- G06F 9/3836Instruction issuing10,000
- G06F 9/3885Using a plurality of independent parallel functional units5,638
- G06F 9/3802Instruction prefetching4,748
- G06F 9/3824Operand accessing4,620
- G06F 9/3861Recovery2,995
- G06F 9/3867Using instruction pipelines2,824
- G06F 9/3854Instruction completion2,702
- G06F 9/3877Using a secondary processor2,325
All 9 subgroupsShow fewer
Recent patents
- Decompression engine for decompressing compressed input data that includes multiple streams of data6 Oct 2026US 12,754,738 B2ATI Technologies ULC
- Dataflow-based general-purpose processor architectures with feedforward register lanes6 Oct 2026US 12,754,739 B2The Board of Trustees of the University of Illinois
- Parallel bootstrap and materialization with intelligent resolution6 Oct 2026US 12,754,740 B2Intuit Inc.
- System and method for persisting hardware transactional memory transactions to persistent memory6 Oct 2026US 12,754,842 B1
- Cache structure and utilization6 Oct 2026US 12,754,876 B2Intel Corporation
- Encoding and Decoding Variable Length Instructions8 Oct 2026US 2026/0310465 A1Imagination Technologies Limited
- Inserting null vectors into a stream of vectors8 Oct 2026US 2026/0310466 A1Texas Instruments Incorporated
- Multiple instruction multiple data processing unit8 Oct 2026US 2026/0310467 A1Abaxor Engineering GmbH
- Phase-Aware Resource Tuning Using Behavioral Inference8 Oct 2026US 2026/0310503 A1Arm Limited
- Hardware-Assisted Dynamic Register Allocation8 Oct 2026US 2026/0310610 A1MIPS Tech, LLC
Most cited
By later US patents
- Packet processing system including a policy engine having a classification unit624US 6,157,955 AIntel Corporation · 2000
- Distributed processing memory chip with embedded logic having both data memory and broadcast memory557US 5,751,987 ATexas Instruments Incorporated · 1998
- Method and system for efficient matrix multiplication in a SIMD processor architecture531US 7,873,812 B12011
- Method and apparatus for using smart memories in computing492US 6,807,614 B22004
- System and method for controlling a highly parallel multiprocessor using an anarchy based scheduler for parallel execution thread scheduling448US 5,179,702 ASupercomputer Systems Limited Partnership · 1993