G06F 9/3818
Decoding for concurrent execution
Official title: {Decoding for concurrent execution}
G06F9/3818 (Decoding for concurrent execution) appears on 1,391 US grants and 1,112 published applications in this corpus.
Search patents in G06F- Granted patents
- 1,391
- Published applications
- 1,112
- Assignees
- 271
- Inventors
- 1,896
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1980 | 3 | 0 |
| 1981 | 1 | 0 |
| 1982 | 1 | 0 |
| 1983 | 1 | 0 |
| 1984 | 4 | 0 |
| 1985 | 2 | 0 |
| 1986 | 0 | 0 |
| 1987 | 1 | 0 |
| 1988 | 4 | 0 |
| 1989 | 3 | 0 |
| 1990 | 5 | 0 |
| 1991 | 5 | 0 |
| 1992 | 11 | 0 |
| 1993 | 9 | 0 |
| 1994 | 15 | 0 |
| 1995 | 18 | 0 |
| 1996 | 20 | 0 |
| 1997 | 27 | 0 |
| 1998 | 79 | 0 |
| 1999 | 75 | 0 |
| 2000 | 75 | 0 |
| 2001 | 48 | 7 |
| 2002 | 45 | 33 |
| 2003 | 35 | 38 |
| 2004 | 28 | 36 |
| 2005 | 38 | 29 |
| 2006 | 23 | 33 |
| 2007 | 30 | 31 |
| 2008 | 26 | 37 |
| 2009 | 18 | 59 |
| 2010 | 36 | 26 |
| 2011 | 30 | 13 |
| 2012 | 23 | 20 |
| 2013 | 16 | 17 |
| 2014 | 22 | 28 |
| 2015 | 12 | 40 |
| 2016 | 32 | 57 |
| 2017 | 46 | 57 |
| 2018 | 32 | 27 |
| 2019 | 50 | 69 |
| 2020 | 57 | 92 |
| 2021 | 73 | 70 |
| 2022 | 74 | 96 |
| 2023 | 64 | 58 |
| 2024 | 78 | 56 |
| 2025 | 61 | 50 |
| 2026 | 35 | 33 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Decompression engine for decompressing compressed input data that includes multiple streams of data6 Oct 2026US 12,754,738 B2ATI Technologies ULC
- Cache structure and utilization6 Oct 2026US 12,754,876 B2Intel Corporation
- Systems and methods for updating memory side caches in a multi-GPU configuration15 Sep 2026US 12,737,317 B2Intel Corporation
- Cache structure and utilization15 Sep 2026US 12,737,318 B2Intel Corporation
- Method and apparatus for permuting streamed data elements8 Sep 2026US 12,730,758 B2Texas Instruments Incorporated
- Encoding and Decoding Variable Length Instructions8 Oct 2026US 2026/0310465 A1Imagination Technologies Limited
- Inserting null vectors into a stream of vectors8 Oct 2026US 2026/0310466 A1Texas Instruments Incorporated
- Systems, methods, and apparatuses for tile transpose24 Sep 2026US 2026/0288459 A1Intel Products IP LLC
- Identifying decoding techniques24 Sep 2026US 2026/0288465 A1NVIDIA Corporation
- Memory handling with delegated tasks24 Sep 2026US 2026/0288647 A1Arm Limited
Most cited
By later US patents
- Method and apparatus for patching problematic instructions in a microprocessor using software interrupts422US 6,631,463 B1International Business Machines Corporation · 2003
- Pipelined data processor capable of decoding and executing plural instructions in parallel341US 4,858,105 AHitachi, Ltd. · 1989
- High performance superscalar microprocessor including a common reorder buffer and common register file for both integer and floating point operations320US 5,651,125 AAdvanced Micro Devices, Inc. · 1997
- RISC architecture computer configured for emulation of the instruction set of a target computer288US 5,574,927 AInternational Meta Systems, Inc. · 1996
- Multiple tokenization for authentication283US 9,280,765 B2Visa International Service Association · 2016