G06F 9/382
Pipelined decoding
Official title: {Pipelined decoding, e.g. using predecoding}
G06F9/382 (Pipelined decoding) appears on 643 US grants and 428 published applications in this corpus.
Search patents in G06F- Granted patents
- 643
- Published applications
- 428
- Assignees
- 139
- Inventors
- 901
- Latest grant
- 16 Jun 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1980 | 1 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 2 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 1 | 0 |
| 1988 | 2 | 0 |
| 1989 | 2 | 0 |
| 1990 | 1 | 0 |
| 1991 | 2 | 0 |
| 1992 | 5 | 0 |
| 1993 | 5 | 0 |
| 1994 | 8 | 0 |
| 1995 | 8 | 0 |
| 1996 | 12 | 0 |
| 1997 | 12 | 0 |
| 1998 | 46 | 0 |
| 1999 | 56 | 0 |
| 2000 | 45 | 0 |
| 2001 | 29 | 3 |
| 2002 | 25 | 16 |
| 2003 | 24 | 23 |
| 2004 | 14 | 21 |
| 2005 | 21 | 18 |
| 2006 | 12 | 26 |
| 2007 | 16 | 18 |
| 2008 | 23 | 29 |
| 2009 | 11 | 50 |
| 2010 | 22 | 21 |
| 2011 | 24 | 6 |
| 2012 | 21 | 13 |
| 2013 | 12 | 11 |
| 2014 | 16 | 13 |
| 2015 | 7 | 13 |
| 2016 | 12 | 23 |
| 2017 | 23 | 10 |
| 2018 | 16 | 11 |
| 2019 | 16 | 19 |
| 2020 | 16 | 17 |
| 2021 | 17 | 16 |
| 2022 | 12 | 14 |
| 2023 | 13 | 10 |
| 2024 | 14 | 6 |
| 2025 | 12 | 14 |
| 2026 | 7 | 7 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Coprocessor prefetcher16 Jun 2026US 12,657,031 B2Apple Inc.
- Operation cache2 Jun 2026US 12,645,460 B2Advanced Micro Devices, Inc.
- Cache control to preserve register data12 May 2026US 12,625,821 B2Apple Inc.
- Method and system for assigning instructions to decoders in decoder clusters7 Apr 2026US 12,596,551 B2Hygon Information Technology Co., Ltd.
- Core criticality performance enhancements10 Mar 2026US 12,572,625 B1Apple Inc.
- Encoding and Decoding Variable Length Instructions8 Oct 2026US 2026/0310465 A1Imagination Technologies Limited
- Memory handling with delegated tasks24 Sep 2026US 2026/0288647 A1Arm Limited
- Expandable instruction set30 Jul 2026US 2026/0219886 A1Arm Limited
- Variable-length instruction set mode30 Jul 2026US 2026/0219888 A1Arm Limited
- Streaming engine with error detection, correction and restart16 Jul 2026US 2026/0203168 A1Texas Instruments Incorporated
Most cited
By later US patents
- Method and apparatus for patching problematic instructions in a microprocessor using software interrupts422US 6,631,463 B1International Business Machines Corporation · 2003
- Multiple instruction decoder for minimizing register port requirements230US 5,129,067 AAdvanced Micro Devices, Inc. · 1992
- Multi-instruction stream branch processing mechanism204US 4,200,927 AInternational Business Machines Corporation · 1980
- Data cache which speculatively updates a predicted data cache storage location with store data and subsequently corrects mispredicted updates200US 5,860,104 AAdvanced Micro Devices, Inc. · 1999
- Method of executing coded instructions in a multiprocessor having shared execution resources including active, nap, and sleep states in accordance with cache miss latency142US 6,035,374 ASun Microsystems, Inc. · 2000