G06F 9/3802
Instruction prefetching
Official title: {Instruction prefetching}
G06F9/3802 (Instruction prefetching) appears on 4,748 US grants and 3,921 published applications in this corpus.
Search patents in G06F- Granted patents
- 4,748
- Published applications
- 3,921
- Assignees
- 659
- Inventors
- 5,931
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 2 | 0 |
| 1977 | 2 | 0 |
| 1978 | 3 | 0 |
| 1979 | 1 | 0 |
| 1980 | 3 | 0 |
| 1981 | 1 | 0 |
| 1982 | 8 | 0 |
| 1983 | 2 | 0 |
| 1984 | 3 | 0 |
| 1985 | 10 | 0 |
| 1986 | 10 | 0 |
| 1987 | 19 | 0 |
| 1988 | 19 | 0 |
| 1989 | 23 | 0 |
| 1990 | 16 | 0 |
| 1991 | 25 | 0 |
| 1992 | 37 | 0 |
| 1993 | 38 | 0 |
| 1994 | 37 | 0 |
| 1995 | 67 | 0 |
| 1996 | 87 | 0 |
| 1997 | 106 | 0 |
| 1998 | 212 | 0 |
| 1999 | 172 | 0 |
| 2000 | 141 | 0 |
| 2001 | 143 | 36 |
| 2002 | 123 | 120 |
| 2003 | 116 | 126 |
| 2004 | 111 | 159 |
| 2005 | 103 | 140 |
| 2006 | 122 | 129 |
| 2007 | 104 | 125 |
| 2008 | 118 | 172 |
| 2009 | 105 | 125 |
| 2010 | 133 | 91 |
| 2011 | 124 | 71 |
| 2012 | 95 | 109 |
| 2013 | 76 | 125 |
| 2014 | 93 | 148 |
| 2015 | 105 | 162 |
| 2016 | 189 | 197 |
| 2017 | 185 | 222 |
| 2018 | 129 | 156 |
| 2019 | 221 | 232 |
| 2020 | 239 | 255 |
| 2021 | 236 | 199 |
| 2022 | 219 | 208 |
| 2023 | 162 | 157 |
| 2024 | 192 | 165 |
| 2025 | 162 | 156 |
| 2026 | 99 | 136 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Cache structure and utilization6 Oct 2026US 12,754,876 B2Intel Corporation
- Processor embedded streaming buffer29 Sep 2026US 12,748,592 B2Intel Corporation
- Instruction fetching22 Sep 2026US 12,743,281 B2Arm Limited
- Systems and methods for exploiting queues and transitional storage for improved low-latency high-bandwidth on-die data retrieval22 Sep 2026US 12,743,741 B2Intel Corporation
- Cross drawer message passing in a strongly ordered coherent symmetric multiprocessing (SMP) cache15 Sep 2026US 12,737,188 B2International Business Machines Corporation
- Encoding and Decoding Variable Length Instructions8 Oct 2026US 2026/0310465 A1Imagination Technologies Limited
- Inserting null vectors into a stream of vectors8 Oct 2026US 2026/0310466 A1Texas Instruments Incorporated
- Phase-Aware Resource Tuning Using Behavioral Inference8 Oct 2026US 2026/0310503 A1Arm Limited
- Data processing apparatus and method1 Oct 2026US 2026/0299954 A1Smarter Silicon (Shanghai) Technologies Co., Ltd.
- Combined load value and load address prediction1 Oct 2026US 2026/0299955 A1
Most cited
By later US patents
- System and method for controlling a highly parallel multiprocessor using an anarchy based scheduler for parallel execution thread scheduling448US 5,179,702 ASupercomputer Systems Limited Partnership · 1993
- Apparatus and method for aborting un-needed instruction fetches in a digital microprocessor device433US 6,092,186 ALucent Technologies Inc. · 2000
- Method and apparatus for patching problematic instructions in a microprocessor using software interrupts422US 6,631,463 B1International Business Machines Corporation · 2003
- Processor having plurality of functional units for orderly retiring outstanding operations based upon its associated tags403US 5,226,126 ANexgen Microsystems · 1993
- Dynamic multi-mode parallel processing array390US 5,475,856 AInternational Business Machines Corporation · 1995