Instruction fetching

A method comprising:

• storing instruction fetch entries in an instruction fetch queue;
• for each of the instruction fetch entries and in response to a determination that a block of instructions indicated by that instruction fetch entry is not present in instruction storage circuitry, issuing a request to fetch the block of instructions and causing the block of instructions to be allocated to the instruction storage circuitry;
• and
• deriving a variable throttling threshold from properties of one or more previously fetched blocks of instructions, the properties determined before or during storage of the one or more previously fetched blocks of instructions in the instruction storage circuitry;
• and
• when operating in a first operation mode suppressing issuing the request in response to a number of outstanding requests to fetch blocks of instructions meeting or exceeding the variable throttling threshold.

A non-transitory computer-readable medium storing computer-readable code for fabrication of an apparatus comprising:

• an instruction fetch queue for storage of instruction fetch entries;
• prefetching circuitry configured, for each of the instruction fetch entries and in response to a determination that a block of instructions indicated by that instruction fetch entry is not present in instruction storage circuitry, to issue a request to fetch the block of instructions and to cause the block of instructions to be allocated to the instruction storage circuitry;
• and
• control circuitry configured to operate in a first operation mode, wherein when operating in the first operation mode, the control circuitry is configured to suppress issuing the request in response to a number of outstanding requests to fetch blocks of instructions meeting or exceeding a variable throttling threshold, wherein the control circuitry is configured to derive the variable throttling threshold from properties of one or more previously fetched blocks of instructions, the properties determined before or during storage of the one or more previously fetched blocks of instructions in the instruction storage circuitry.