Efficient matrix multiply and add with a group of warps

A method comprising:

• receiving, at a processor, an instruction stream including a matrix multiply and accumulate (MMA) instruction to determine a result matrix based on input matrices;
• distributing a plurality of warps to a plurality of cores, each core comprising a datapath, each warp including a plurality of threads configured to cooperatively execute the MMA instruction;
• and
• coordinating, by a hardware state machine circuit, the execution of the MMA instruction, wherein the coordinating comprises, in response to the plurality of threads issuing the MMA instruction and independently of the plurality of threads:
• (i) the hardware state machine circuit loading operands of the input matrices to inputs of the respective datapaths of the plurality of cores;
• and (ii) the hardware state machine circuit controlling execution of the MMA instruction on the respective datapaths to generate a respective portion of the result matrix at an output of each datapath.