Implementing specialized floating point instructions on an integer pipeline for accelerating dynamic programming algorithms

One or more non-transitory computer readable media including instructions that, when executed by one or more processors, cause the one or more processors to execute dynamic programming algorithms by performing steps of:

• during a first iteration of a loop of a dynamic programming algorithm, executing, on an integer pipeline, at least one of a first floating point fused addition and comparison instruction, a first floating point three-operand comparison instruction, or a first floating point two-operand comparison instruction that indicates a first source operand associated with a first destination operand to determine a first result, wherein execution of the at least one of a first floating point fused addition and comparison instruction, a first floating point three-operand comparison instruction, or a first floating point two-operand comparison instruction includes a comparison performed on multiple source operands including the first source operand;
• and
• during a second iteration of the loop, executing, on the integer pipeline, at least one of a second floating point fused addition and comparison instruction, a second floating point three-operand comparison instruction, or a second two-operand comparison instruction that indicates a second source operand associated with a second destination operand to determine a second result based on the first result.