System and method for managing divergent threads in a SIMD architecture
AssigneeNVIDIA Corporation
InventorsBrett W. Coon, John Erik Lindholm
Life of this patent
Estimating the term…
Abstract
One embodiment of a computing system configured to manage divergent threads in a thread group includes a stack configured to store at least one token and a multithreaded processing unit. The multithreaded processing unit is configured to perform the steps of fetching a program instruction, determining that the program instruction is not a branch instruction, determining whether the program instruction includes a pop-synchronization bit, and updating an active program counter, where the fashion in which the active program counter is updated relates to whether the program instruction includes a pop-synchronization bit.
Claims15
A method for managing threads in a thread group, wherein each of the threads is assigned to one of a plurality of samples to be processed and when operating in a synchronized mode each of active threads simultaneously executes identical operations on a different one of the samples, one or more of the threads being allowed to diverge and execute operations on a sample not executed by the other threads and then return to synchronized operation with the other threads, the method comprising:
- fetching a program instruction;
- determining that the program instruction is a branch instruction and modifying an active mask to indicate threads that do not take the branch;
- upon determining that the program instruction is not an instruction whose opcode specifies a non-sequential change in a program address, then determining whether the program instruction includes a pop-synchronization bit, the pop-synchronization bit indicating that threads in the thread group have diverged since a synchronization token was pushed onto a stack;
- updating an active program counter, wherein the manner in which the active program counter is updated relates to whether the program instruction includes a pop-synchronization bit;
- and
- updating an active mask indicating which of the threads remain active upon determining there is the pop-synchronization bit.
A computing system comprising a multithreaded processing unit configured to manage divergent threads in a thread group, wherein each of the threads is assigned to one of a plurality of samples to be processed and when operating in a synchronized mode each active thread simultaneously executes identical operations on a different one of the samples, one or more of the threads being allowed to diverge and execute operations on a sample not executed by the other threads and then return to synchronized operation with the other threads, the computing system comprising:
- a stack configured to store at least one token;
- and
- a multithreaded processing unit configured to perform the steps of:
- fetching a program instruction,
- determining that the program instruction is a branch instruction and updating a program counter to fetch a next instruction for active threads of the thread group;
- upon determining that the program instruction is not an instruction whose opcode specifies a non-sequential change in a program address, then determining whether the program instruction includes a pop-synchronization bit, the pop-synchronization bit indicating that threads in the thread group that have diverged since a synchronization token was pushed onto the stack are to be executed to the address of the instruction that includes the pop synchronization bit,
- popping the token at the top of the stack and setting an active mask to indicate the active threads in the thread group upon determining there is a pop-synchronization bit;
- and
- updating an active program counter, wherein the manner in which the active program counter is updated relates to whether the program instruction includes the pop-synchronization bit.
Dependencies are inferred from the claim text.