G06F 13/4243
With synchronous protocol
Official title: {with synchronous protocol}
G06F13/4243 (With synchronous protocol) appears on 1,063 US grants and 891 published applications in this corpus.
Search patents in G06F- Granted patents
- 1,063
- Published applications
- 891
- Assignees
- 264
- Inventors
- 1,536
- Latest grant
- 25 Aug 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 3 | 0 |
| 1977 | 7 | 0 |
| 1978 | 6 | 0 |
| 1979 | 2 | 0 |
| 1980 | 2 | 0 |
| 1981 | 2 | 0 |
| 1982 | 1 | 0 |
| 1983 | 1 | 0 |
| 1984 | 3 | 0 |
| 1985 | 3 | 0 |
| 1986 | 6 | 0 |
| 1987 | 5 | 0 |
| 1988 | 3 | 0 |
| 1989 | 5 | 0 |
| 1990 | 1 | 0 |
| 1991 | 2 | 0 |
| 1992 | 10 | 0 |
| 1993 | 5 | 0 |
| 1994 | 12 | 0 |
| 1995 | 10 | 0 |
| 1996 | 11 | 0 |
| 1997 | 13 | 0 |
| 1998 | 28 | 0 |
| 1999 | 12 | 0 |
| 2000 | 21 | 0 |
| 2001 | 42 | 10 |
| 2002 | 33 | 30 |
| 2003 | 31 | 42 |
| 2004 | 32 | 50 |
| 2005 | 32 | 53 |
| 2006 | 53 | 36 |
| 2007 | 33 | 54 |
| 2008 | 30 | 72 |
| 2009 | 47 | 59 |
| 2010 | 36 | 34 |
| 2011 | 49 | 33 |
| 2012 | 44 | 34 |
| 2013 | 43 | 35 |
| 2014 | 50 | 42 |
| 2015 | 31 | 28 |
| 2016 | 31 | 35 |
| 2017 | 42 | 37 |
| 2018 | 33 | 31 |
| 2019 | 41 | 39 |
| 2020 | 36 | 28 |
| 2021 | 29 | 24 |
| 2022 | 22 | 17 |
| 2023 | 18 | 20 |
| 2024 | 20 | 25 |
| 2025 | 21 | 14 |
| 2026 | 10 | 9 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Memory module and computing device containing the memory module25 Aug 2026US 12,717,523 B2AI Plus, Inc.
- Clock-to-data synchronization14 Jul 2026US 12,681,525 B2NVIDIA Corporation
- Systems, methods, and devices for data storage with specified data transfer rate19 May 2026US 12,632,181 B2Samsung Electronics Co., Ltd.
- Computer architecture having selectable parallel and serial communication channels between processors and memory5 May 2026US 12,619,276 B2Wisconsin Alumni Research Foundation
- Delay adjuster based clock qualifier timing enhancement for memory interface5 May 2026US 12,620,432 B2QUALCOMM Incorporated
- Clock-to-data synchronization1 Oct 2026US 2026/0299641 A1NVIDIA Corporation
- Non-volatile memory device having high i/o efficiency based on separate command address protocol, operation method thereof, and storage device including same20 Aug 2026US 2026/0244366 A1Samsung Electronics Co., Ltd.
- Computer Architecture Having Selectable, Parallel and Serial Communication Channels Between Processors and Memory6 Aug 2026US 2026/0227822 A1Wisconsin Alumni Research Foundation
- Methods and apparatus for chip selecting techniques30 Jul 2026US 2026/0220056 A1Intel Corporation
- Memory systems for reducing signal line loads and occupied areas25 Jun 2026US 2026/0178218 A1Samsung Electronics Co., Ltd.
Most cited
By later US patents
- Solid state memory system including plural memory chips and a serialized bus546US 5,430,859 ASunDisk Corporation · 1995
- Memory system having synchronous-link DRAM (SLDRAM) devices and controller383US 6,442,644 B1Advanced Memory International, Inc. · 2002
- Bus system optimization316US 6,643,787 B1Rambus Inc. · 2003
- High bandwidth memory interface294US 6,510,503 B2Mosaid Technologies Incorporated · 2003
- Multi-tier point-to-point ring memory interface283US 6,658,509 B1Intel Corporation · 2003