Clock-to-data synchronization
AssigneeNVIDIA Corporation
InventorsOfek Abadi, Omer Wolkovitz
Life of this patent
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Abstract
Technology related to calibrating synchronization of a data signal to a forwarded clock signal is described. A circuit includes a receiver circuit and a clock-to-data synchronization circuit. The receiver circuit receives a data signal and includes two inverters and two resistors. The clock-to-data synchronization circuit receives the data signal and the clock signal and determines an indication of synchronization between the data and clock signals. The clock-to-data synchronization circuit adjusts, using the indication, a parameter of the receiver circuit to synchronize the data signal and the clock signal.
Claims20
A communication circuit comprising:
- a data path;
- a clock path;
- and
- circuitry configured to compensate for skew between a data signal of the data path and a clock signal of the clock path by adjusting a peak-to-peak voltage amplitude of the data signal to match a peak-to-peak voltage amplitude of the clock signal.
A method of operating a communication circuit comprising a data path and a clock path, the method comprising:
- compensating for skew between a data signal of the data path and a clock signal of the clock path by adjusting a peak-to-peak voltage amplitude of the data signal to match a peak-to-peak voltage amplitude of the clock signal.
A communication system comprising:
- a first die comprising:
- a first transmitter circuit;
- and
- a clock generation circuit configured to generate one or more clock signals;
- a second die comprising:
- a first receiver circuit configured to receive a first data signal from the first transmitter circuit;
- clock circuitry configured to receive the one or more clock signals from the clock generation circuit;
- and
- a clock path between the first die and the second die;
- and
- circuitry configured to compensate for skew between the first data signal and the one or more clock signals by adjusting a peak-to-peak voltage amplitude of the first data signal to match a peak-to-peak voltage amplitude of the one or more clock signals.
Dependencies are inferred from the claim text.