G06F 13/4234
Being a memory bus
Official title: {being a memory bus}
G06F13/4234 (Being a memory bus) appears on 1,998 US grants and 1,789 published applications in this corpus.
Search patents in G06F- Granted patents
- 1,998
- Published applications
- 1,789
- Assignees
- 468
- Inventors
- 2,979
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 4 | 0 |
| 1977 | 9 | 0 |
| 1978 | 6 | 0 |
| 1979 | 5 | 0 |
| 1980 | 4 | 0 |
| 1981 | 4 | 0 |
| 1982 | 3 | 0 |
| 1983 | 2 | 0 |
| 1984 | 7 | 0 |
| 1985 | 4 | 0 |
| 1986 | 9 | 0 |
| 1987 | 6 | 0 |
| 1988 | 5 | 0 |
| 1989 | 7 | 0 |
| 1990 | 1 | 0 |
| 1991 | 3 | 0 |
| 1992 | 15 | 0 |
| 1993 | 10 | 0 |
| 1994 | 20 | 0 |
| 1995 | 18 | 0 |
| 1996 | 21 | 0 |
| 1997 | 27 | 0 |
| 1998 | 41 | 0 |
| 1999 | 27 | 0 |
| 2000 | 43 | 0 |
| 2001 | 55 | 16 |
| 2002 | 46 | 57 |
| 2003 | 47 | 58 |
| 2004 | 49 | 75 |
| 2005 | 48 | 84 |
| 2006 | 74 | 59 |
| 2007 | 63 | 90 |
| 2008 | 41 | 116 |
| 2009 | 66 | 101 |
| 2010 | 61 | 75 |
| 2011 | 83 | 62 |
| 2012 | 75 | 66 |
| 2013 | 70 | 59 |
| 2014 | 90 | 83 |
| 2015 | 70 | 90 |
| 2016 | 73 | 75 |
| 2017 | 101 | 90 |
| 2018 | 80 | 76 |
| 2019 | 113 | 101 |
| 2020 | 90 | 68 |
| 2021 | 67 | 61 |
| 2022 | 58 | 52 |
| 2023 | 53 | 49 |
| 2024 | 47 | 53 |
| 2025 | 47 | 41 |
| 2026 | 30 | 32 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Systems and methods for scalable and coherent memory devices6 Oct 2026US 12,754,840 B2Samsung Electronics Co., Ltd.
- Memory protocol22 Sep 2026US 12,743,236 B2
- Apparatuses and methods for encoding and decoding of signal lines for multi-level communication architectures8 Sep 2026US 12,730,562 B2
- Memory module and computing device containing the memory module25 Aug 2026US 12,717,523 B2AI Plus, Inc.
- Systems and methods for high bandwidth memory with unidirectional data flow11 Aug 2026US 12,705,202 B2Google Inc.
- Clock-to-data synchronization1 Oct 2026US 2026/0299641 A1NVIDIA Corporation
- Memory controller, memory system, and control method of memory controller24 Sep 2026US 2026/0288643 A1Kioxia Corporation
- Apparatus with loopback control mechanism and methods for operating the same27 Aug 2026US 2026/0252521 A1Micron Technology, Inc.
- Non-volatile memory device having high i/o efficiency based on separate command address protocol, operation method thereof, and storage device including same20 Aug 2026US 2026/0244366 A1Samsung Electronics Co., Ltd.
- Computer Architecture Having Selectable, Parallel and Serial Communication Channels Between Processors and Memory6 Aug 2026US 2026/0227822 A1Wisconsin Alumni Research Foundation
Most cited
By later US patents
- Solid state memory system including plural memory chips and a serialized bus546US 5,430,859 ASunDisk Corporation · 1995
- Memory system having synchronous-link DRAM (SLDRAM) devices and controller383US 6,442,644 B1Advanced Memory International, Inc. · 2002
- Integrated circuit I/O using high performance bus interface325US 5,319,755 ARambus Inc. · 1994
- Bus system optimization316US 6,643,787 B1Rambus Inc. · 2003
- High bandwidth memory interface294US 6,510,503 B2Mosaid Technologies Incorporated · 2003