G01R 31/31901
Analysis of tester performance
Official title: {Analysis of tester Performance; Tester characterization}
G01R31/31901 (Analysis of tester performance) appears on 58 US grants and 75 published applications in this corpus.
Search patents in G01R- Granted patents
- 58
- Published applications
- 75
- Assignees
- 44
- Inventors
- 152
- Latest grant
- 1 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 2000 | 1 | 0 |
| 2001 | 0 | 2 |
| 2002 | 2 | 1 |
| 2003 | 4 | 6 |
| 2004 | 4 | 8 |
| 2005 | 7 | 3 |
| 2006 | 0 | 7 |
| 2007 | 1 | 7 |
| 2008 | 5 | 4 |
| 2009 | 3 | 1 |
| 2010 | 3 | 2 |
| 2011 | 1 | 0 |
| 2012 | 0 | 2 |
| 2013 | 1 | 0 |
| 2014 | 2 | 1 |
| 2015 | 1 | 2 |
| 2016 | 0 | 1 |
| 2017 | 4 | 4 |
| 2018 | 3 | 4 |
| 2019 | 1 | 2 |
| 2020 | 3 | 1 |
| 2021 | 2 | 4 |
| 2022 | 3 | 3 |
| 2023 | 2 | 5 |
| 2024 | 1 | 3 |
| 2025 | 3 | 2 |
| 2026 | 1 | 0 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Seamless universal verification methodology1 Sep 2026US 12,724,070 B1Amazon Technologies, Inc.
- Diagnostic tool for traffic capture with known signature database2 Dec 2025US 12,487,286 B2Advantest Corporation
- Self-diagnosis circuit and semiconductor device2 Sep 2025US 12,405,306 B2Rohm Co., Ltd.
- Test time reduction in circuits with redundancy flip-flops1 Apr 2025US 12,265,124 B1STMicroelectronics International N. V.
- Method of finding optimized analog measurement hardware settings as well as method of measuring a device under test12 Nov 2024US 12,140,630 B2Rohde & Schwarz GmbH & Co.KG
- Self-diagnosis circuit and semiconductor device16 Oct 2025US 2025/0321273 A1Rohm Co., Ltd.
- Test time reduction in circuits with redundancy flip-flops27 Mar 2025US 2025/0102574 A1STMicroelectronics International N. V.
- Fault detection in parallel hardware5 Dec 2024US 2024/0402250 A1NVIDIA Corporation
- Method, central test control unit, measurement system18 Jul 2024US 2024/0241175 A1Rohde & Schwarz GmbH & Co.KG
- Self-diagnosis circuit and semiconductor device30 May 2024US 2024/0175922 A1Rohm Co., Ltd.
Most cited
By later US patents
- Programmable built-in self-test system for semiconductor memory device43US 6,658,611 B1Samsung Electronics Co., Ltd. · 2003
- Method for generating a Shmoo plot contour for integrated circuit tester12US 6,079,038 ACredence Systems Corporation · 2000
- System and method for testing and evaluating a device12US 6,407,572 B1Fujitsu Limited · 2002
- Method of and system for monitoring the functionality of a wafer probe site11US 7,453,261 B1Xilinx, Inc. · 2008
- Method of and system for generating a binary shmoo plot in N-dimensional space7US 6,418,387 B1LTX Corporation · 2002