G01R 31/31727
Clock circuits aspects
Official title: {Clock circuits aspects, e.g. test clock circuit details, timing aspects for signal generation, circuits for testing clocks (G01R31/31725 takes precedence; concerning scan test G01R31/318552, for tester hardware G01R31/31922)}
G01R31/31727 (Clock circuits aspects) appears on 1,026 US grants and 1,062 published applications in this corpus.
Search patents in G01R- Granted patents
- 1,026
- Published applications
- 1,062
- Assignees
- 243
- Inventors
- 1,527
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1978 | 1 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 1 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 1 | 0 |
| 1993 | 1 | 0 |
| 1994 | 1 | 0 |
| 1995 | 0 | 0 |
| 1996 | 4 | 0 |
| 1997 | 7 | 0 |
| 1998 | 4 | 0 |
| 1999 | 6 | 0 |
| 2000 | 0 | 0 |
| 2001 | 3 | 1 |
| 2002 | 4 | 4 |
| 2003 | 7 | 15 |
| 2004 | 9 | 9 |
| 2005 | 13 | 29 |
| 2006 | 22 | 30 |
| 2007 | 25 | 53 |
| 2008 | 36 | 47 |
| 2009 | 44 | 39 |
| 2010 | 44 | 41 |
| 2011 | 55 | 40 |
| 2012 | 38 | 43 |
| 2013 | 36 | 38 |
| 2014 | 42 | 41 |
| 2015 | 50 | 60 |
| 2016 | 68 | 79 |
| 2017 | 54 | 62 |
| 2018 | 70 | 52 |
| 2019 | 50 | 52 |
| 2020 | 55 | 43 |
| 2021 | 48 | 35 |
| 2022 | 41 | 47 |
| 2023 | 49 | 46 |
| 2024 | 57 | 67 |
| 2025 | 45 | 46 |
| 2026 | 35 | 43 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- I3C error states test strategy6 Oct 2026US 12,754,235 B2Microchip Technology Incorporated
- Data correction and phase optimization in high-speed receivers6 Oct 2026US 12,754,237 B2Diodes Incorporated
- Low power and area clock monitoring circuit using ring delay arrangement8 Sep 2026US 12,730,148 B2NVIDIA Corporation
- Display device, panel defect detection circuit and panel defect detection method8 Sep 2026US 12,730,149 B2LG Display Co., Ltd.
- Loopback test for phase interpolator codes8 Sep 2026US 12,730,150 B1Cadence Design Systems, Inc.
- Multi-phase synchronized method for lane margining1 Oct 2026US 2026/0299021 A1SK hynix Inc.
- Memory, memory system and method of controlling storage device24 Sep 2026US 2026/0287653 A1Kioxia Corporation
- Memory devices and memory systems outputting codes24 Sep 2026US 2026/0287654 A1SK hynix Inc.
- Providing Authentication in a Network24 Sep 2026US 2026/0287655 A1Comcast Cable Communications, LLC
- Low cost on-chip built-in self-test architecture for millimeter wave radio freqency integrated circuit24 Sep 2026US 2026/0291625 A1Samsung Electronics Co., Ltd.
Most cited
By later US patents
- Apparatus for at-speed testing, in inter-domain mode, of a multi-clock-domain digital integrated circuit according to BIST or SCAN techniques226US 8,862,955 B2STMicroelectronics S,r.l. · 2014
- Method of synchronizing a pair of central processor units for duplex, lock-step operation by copying data into a corresponding locations of another memory159US 5,751,955 ATandem Computers Incorporated · 1998
- Self-checked, lock step processor pairs152US 6,233,702 B1Compaq Computer Corporation · 2001
- Fail-fast, fail-functional, fault-tolerant multiprocessor system136US 5,751,932 ATandem Computers Incorporated · 1998
- Synchronized data transmission between elements of a processing system120US 5,574,849 ATandem Computers Incorporated · 1996