H10P 58/20
Comprising two or more processes
Official title: {comprising two or more processes, e.g. etching and cutting}
H10P58/20 (Comprising two or more processes) appears on 0 US grants and 32 published applications in this corpus.
Search patents in H10P- Granted patents
- 0
- Published applications
- 32
- Assignees
- 22
- Inventors
- 94
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 2014 | 0 | 1 |
| 2015 | 0 | 0 |
| 2016 | 0 | 0 |
| 2017 | 0 | 0 |
| 2018 | 0 | 0 |
| 2019 | 0 | 0 |
| 2020 | 0 | 0 |
| 2021 | 0 | 0 |
| 2022 | 0 | 1 |
| 2023 | 0 | 0 |
| 2024 | 0 | 2 |
| 2025 | 0 | 1 |
| 2026 | 0 | 27 |
By publication year. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
No granted patents in this class yet.
- Method for dicing semiconductor wafer and method for manufacturing semiconductor device1 Oct 2026US 2026/0305215 A1Resonac Corporation
- Dual side stealth dicing for forming memory chips1 Oct 2026US 2026/0305216 A1Micron Technology, Inc.
- Method for cleaning semiconductor chip, and method for manufacturing semiconductor device1 Oct 2026US 2026/0305220 A1
- Method for manufacturing a plurality of semiconductor chips24 Sep 2026US 2026/0293565 A1ams-OSRAM International GmbH
- Wafer processing method24 Sep 2026US 2026/0293566 A1Disco Corporation
Most cited
By later US patents
No patent in this class has been cited by a later US patent yet.