Method for manufacturing a plurality of semiconductor chips

Abstract

In an embodiment a method includes providing a functional semiconductor wafer having an epitaxial semiconductor layer sequence with a plurality of chip regions, wherein the epitaxial semiconductor layer sequence is arranged on a growth substrate and a sacrificial layer is arranged at least between the chip regions and the growth substrate, providing a carrier wafer, bonding the functional semiconductor wafer and the carrier wafer together such that a wafer compound is achieved, generating grooves between the chip regions through the growth substrate and the sacrificial layer such that the sacrificial layer is accessible through the grooves, arranging the wafer compound and a second ECE contact in an electrochemical etchant, and electrochemical etching the sacrificial layer by applying an ECE voltage between a first ECE contact and the second ECE contact.

Dependencies are inferred from the claim text.