H10P 32/1406
By ion implantation
Official title: {by ion implantation}
H10P32/1406 (By ion implantation) appears on 691 US grants and 703 published applications in this corpus.
Search patents in H10P- Granted patents
- 691
- Published applications
- 703
- Assignees
- 233
- Inventors
- 1,230
- Latest grant
- 29 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 2 | 0 |
| 1977 | 4 | 0 |
| 1978 | 0 | 0 |
| 1979 | 4 | 0 |
| 1980 | 0 | 0 |
| 1981 | 7 | 0 |
| 1982 | 0 | 0 |
| 1983 | 2 | 0 |
| 1984 | 1 | 0 |
| 1985 | 3 | 0 |
| 1986 | 3 | 0 |
| 1987 | 2 | 0 |
| 1988 | 3 | 0 |
| 1989 | 4 | 0 |
| 1990 | 3 | 0 |
| 1991 | 5 | 0 |
| 1992 | 2 | 0 |
| 1993 | 5 | 0 |
| 1994 | 2 | 0 |
| 1995 | 1 | 0 |
| 1996 | 1 | 0 |
| 1997 | 3 | 0 |
| 1998 | 1 | 0 |
| 1999 | 3 | 0 |
| 2000 | 4 | 0 |
| 2001 | 7 | 3 |
| 2002 | 5 | 4 |
| 2003 | 7 | 5 |
| 2004 | 3 | 9 |
| 2005 | 7 | 6 |
| 2006 | 3 | 6 |
| 2007 | 5 | 7 |
| 2008 | 4 | 7 |
| 2009 | 6 | 5 |
| 2010 | 4 | 8 |
| 2011 | 7 | 8 |
| 2012 | 6 | 9 |
| 2013 | 5 | 11 |
| 2014 | 10 | 23 |
| 2015 | 25 | 45 |
| 2016 | 65 | 78 |
| 2017 | 67 | 92 |
| 2018 | 57 | 56 |
| 2019 | 66 | 69 |
| 2020 | 67 | 59 |
| 2021 | 54 | 61 |
| 2022 | 41 | 46 |
| 2023 | 42 | 27 |
| 2024 | 28 | 34 |
| 2025 | 22 | 21 |
| 2026 | 13 | 4 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Semiconductor device with metal silicide layer and method for manufacturing the same29 Sep 2026US 12,751,059 B2Kabushiki Kaisha Toshiba
- Method of manufacturing semiconductor device1 Sep 2026US 12,727,183 B2Renesas Electronics Corporation
- Semiconductor device25 Aug 2026US 12,720,816 B2Mitsubishi Electric Corporation
- Semiconductor device and manufacturing method thereof4 Aug 2026US 12,701,760 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Fin structure with reduced defects and manufacturing method thereof4 Aug 2026US 12,701,934 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Rugged ldmos with reduced nsd in source18 Jun 2026US 2026/0173441 A1
- Semiconductor structure and fabrication method thereof11 Jun 2026US 2026/0164791 A1Vanguard International Semiconductor Corporation
- Method for manufacturing semiconductor device and semiconductor device5 Mar 2026US 2026/0068561 A1Kabushiki Kaisha Toshiba
- Solid phase epitaxy of amorphous semiconductor over a crystalline substrate1 Jan 2026US 2026/0006896 A1
- Pdsoi transistor and method for fabricating same27 Nov 2025US 2025/0366020 A1Hangzhou HFC Semiconductor Co.
Most cited
By later US patents
- Process for forming retrograde dopant distributions utilizing simultaneous outdiffusion of dopants167US 4,578,128 ANCR Corporation · 1986
- MISFET semiconductor device having relative impurity concentration levels between layers160US 6,323,525 B1Kabushiki Kaisha Toshiba · 2001
- N-type buried layer drive-in recipe to reduce pits over buried antimony layer122US 6,444,551 B1Taiwan Semiconductor Manufacturing Company.Ltd · 2002
- Threshold voltage control layer in a semiconductor device120US 7,304,350 B2Matsushita Electric Industrial Co., Ltd. · 2007
- Method of making high breakdown voltage semiconductor device99US 4,927,772 AGeneral Electric Company · 1990