Semiconductor device
AssigneeMitsubishi Electric Corporation
InventorTatsuo Harada
Life of this patent
Estimating the term…
Abstract
A trench gate type semiconductor device is provided with an active region that is a region where an n+-type emitter layer is provided adjacent to a trench and a thinned region that is a region where the n+-type emitter layer is not provided adjacent to the trench. In the active region, a first n-type carrier accumulation layer is provided as a carrier accumulation layer. In the thinned region, a second n-type carrier accumulation layer having a lower impurity concentration than the first n-type carrier accumulation layer is provided as the carrier accumulation layer. A p+-type contact layer in the thinned region has a portion in contact with an emitter electrode.
Claims7
A semiconductor device comprising:
- a semiconductor substrate having a first main surface and a second main surface opposite to the first main surface;
- a drift layer of a first conductivity type provided between the first main surface and the second main surface of the semiconductor substrate;
- a base layer of a second conductivity type provided in a surface portion of the semiconductor substrate on the first main surface side;
- a carrier accumulation layer of the first conductivity type provided between the base layer and the drift layer and having a higher impurity concentration than the drift layer;
- an emitter layer of the first conductivity type selectively provided in a surface portion of the base layer on the first main surface side;
- a contact layer of the second conductivity type selectively provided in the surface portion of the base layer on the first main surface side and having a higher impurity concentration than the base layer;
- a trench formed in the first main surface of the semiconductor substrate and penetrating the base layer and the carrier accumulation layer to reach the drift layer;
- a gate insulating film provided in an inner surface of the trench;
- a gate electrode provided on the gate insulating film and embedded in the trench;
- an emitter electrode provided on the first main surface of the semiconductor substrate and electrically connected to the emitter layer and the contact layer;
- a collector layer of the second conductivity type provided in a surface portion of the semiconductor substrate on the second main surface side;
- a collector electrode provided on the second main surface of the semiconductor substrate and electrically connected to the collector layer;
- an active region that is a region where the emitter layer is provided adjacent to the trench;
- and
- a thinned region that is a region where the emitter layer is not provided adjacent to the trench,
- wherein
- the active region includes a first carrier accumulation layer as the carrier accumulation layer,
- the thinned region includes a second carrier accumulation layer having a lower impurity concentration than the first carrier accumulation layer as the carrier accumulation layer, and
- the contact layer in the thinned region has a portion in contact with the emitter electrode.
Dependencies are inferred from the claim text.