H10D 84/0191
Manufacturing their doped wells
Official title: {Manufacturing their doped wells}
H10D84/0191 (Manufacturing their doped wells) appears on 1,401 US grants and 1,339 published applications in this corpus.
Search patents in H10D- Granted patents
- 1,401
- Published applications
- 1,339
- Assignees
- 291
- Inventors
- 2,119
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 2 | 0 |
| 1978 | 0 | 0 |
| 1979 | 1 | 0 |
| 1980 | 1 | 0 |
| 1981 | 1 | 0 |
| 1982 | 0 | 0 |
| 1983 | 1 | 0 |
| 1984 | 4 | 0 |
| 1985 | 5 | 0 |
| 1986 | 9 | 0 |
| 1987 | 9 | 0 |
| 1988 | 4 | 0 |
| 1989 | 5 | 0 |
| 1990 | 4 | 0 |
| 1991 | 5 | 0 |
| 1992 | 8 | 0 |
| 1993 | 6 | 0 |
| 1994 | 5 | 0 |
| 1995 | 7 | 0 |
| 1996 | 8 | 0 |
| 1997 | 12 | 0 |
| 1998 | 18 | 0 |
| 1999 | 15 | 0 |
| 2000 | 20 | 0 |
| 2001 | 32 | 12 |
| 2002 | 32 | 24 |
| 2003 | 26 | 32 |
| 2004 | 32 | 48 |
| 2005 | 29 | 45 |
| 2006 | 28 | 51 |
| 2007 | 38 | 46 |
| 2008 | 35 | 73 |
| 2009 | 39 | 36 |
| 2010 | 66 | 56 |
| 2011 | 54 | 30 |
| 2012 | 44 | 45 |
| 2013 | 43 | 35 |
| 2014 | 42 | 48 |
| 2015 | 60 | 65 |
| 2016 | 80 | 88 |
| 2017 | 89 | 93 |
| 2018 | 88 | 90 |
| 2019 | 82 | 75 |
| 2020 | 79 | 72 |
| 2021 | 61 | 61 |
| 2022 | 43 | 57 |
| 2023 | 38 | 36 |
| 2024 | 36 | 44 |
| 2025 | 33 | 43 |
| 2026 | 22 | 34 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- MOSFET and memory cell having improved drain current through back bias application6 Oct 2026US 12,757,460 B2Zeno Semiconductor, Inc.
- Method for forming alignment keys of semiconductor structure and semiconductor structure having alignment keys1 Sep 2026US 12,727,485 B2United Microelectronics Corp.
- Semiconductor device11 Aug 2026US 12,707,710 B2Fuji Electric Co., Ltd.
- Fin loss prevention4 Aug 2026US 12,701,775 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Fin structure with reduced defects and manufacturing method thereof4 Aug 2026US 12,701,934 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Integrated circuit structure and method of forming the same8 Oct 2026US 2026/0314040 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Embedded semiconductor region for latch-up susceptibility improvement8 Oct 2026US 2026/0314060 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Fin loss prevention1 Oct 2026US 2026/0304913 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Integrated circuit device and manufacturing method thereof24 Sep 2026US 2026/0293249 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Avalanche photodiode with a diffused extension layer3 Sep 2026US 2026/0262281 A1Texas Instruments Incorporated
Most cited
By later US patents
- Semiconductor wafer with well contacts on back side319US 6,864,156 B1Xilinx, Inc. · 2005
- Method for engineering the threshold voltage of a device using buried wells197US 6,489,224 B1Sun Microsystems, Inc. · 2002
- Method of fabricating a lateral double-diffused MOSFET (LDMOS) transistor180US 7,405,117 B2Volterra Semiconductor Corporation · 2008
- Field-effect transistor for alleviating short-channel effects174US 6,548,842 B1National Semiconductor Corporation · 2003
- Process for forming retrograde dopant distributions utilizing simultaneous outdiffusion of dopants167US 4,578,128 ANCR Corporation · 1986