Integrated circuit structure and method of forming the same

An integrated circuit manufacturing system, comprising:

• a non-transitory storage medium encoded with a set of instructions;
• a hardware processor communicatively coupled with the non-transitory storage medium and configured to execute the set of instructions, the set of instructions being configured to cause the processor to:
• place a first well layout pattern on a first layout level, the first well layout pattern corresponding to fabricating a first well in an integrated circuit structure, the first well having a first dopant type, the instructions to place the first well layout pattern comprising instructions to:
• place a first layout pattern extending in a first direction and having a first width, the first layout pattern corresponding to fabricating a first portion of the first well, and
• place a second layout pattern adjacent to the first layout pattern, the second layout pattern extending in the first direction and having a second width greater than the first width, the second layout pattern corresponding to fabricating a second portion of the first well;
• place a first implant layout pattern on a second layout level, the first implant layout pattern extending in the first direction, overlapping the first layout pattern and having a third width greater than the first width, the first implant layout pattern corresponding to fabricating a first set of implants in the first portion of the first well of the integrated circuit structure, each implant of the first set of implants having the first dopant type and being separated from each other in the first direction, and at least one implant of the first set of implants being configured to be coupled to a first supply voltage, and
• place a second implant layout pattern on the second layout level, the second implant layout pattern being adjacent to the first implant layout pattern, extending in the first direction, being over the second layout pattern and having a fourth width, the second implant layout pattern corresponding to fabricating a second set of implants in the second portion of the first well of the integrated circuit structure, each implant of the second set of implants having a second dopant type and being separated from each other in the first direction.

An integrated circuit manufacturing system, comprising:

• a non-transitory storage medium encoded with a set of instructions;
• a hardware processor communicatively coupled with the non-transitory storage medium and configured to execute the set of instructions, the set of instructions being configured to cause the processor to:
• generate a first well layout pattern corresponding to fabricating a first well in an integrated circuit structure, the first well having a first dopant type, the set of instructions configured to generate the first well layout pattern comprising instructions to:
• generate a first layout pattern extending in a first direction and having a first width, the first layout pattern corresponding to fabricating a first portion of the first well, and
• generate a second layout pattern extending in the first direction, being adjacent to the first layout pattern, and having a second width greater than the first width, the second layout pattern corresponding to fabricating a second portion of the first well;
• place a first implant layout pattern over the first layout pattern, the first implant layout pattern extending in the first direction, and having a third width greater than the first width, the first implant layout pattern corresponding to fabricating a first set of implants in the first portion of the first well of the integrated circuit structure, each implant of the first set of implants having the first dopant type and being separated from each other in the first direction, and at least one implant of the first set of implants being configured to be coupled to a first supply voltage;
• and
• place a second implant layout pattern over the second layout pattern, the second implant layout pattern extending in the first direction, being adjacent to the first implant layout pattern, and having a fourth width, the second implant layout pattern corresponding to fabricating a second set of implants in the second portion of the first well of the integrated circuit structure, each implant of the second set of implants having a second dopant type and being separated from each other in the first direction.