H10D 84/0107
Integrating at least one component covered by h10d12/00 or h10d30/00 with at
Official title: {Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs}
H10D84/0107 (Integrating at least one component covered by h10d12/00 or h10d30/00 with at) appears on 1,561 US grants and 1,202 published applications in this corpus.
Search patents in H10D- Granted patents
- 1,561
- Published applications
- 1,202
- Assignees
- 374
- Inventors
- 2,457
- Latest grant
- 22 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 4 | 0 |
| 1977 | 4 | 0 |
| 1978 | 1 | 0 |
| 1979 | 1 | 0 |
| 1980 | 1 | 0 |
| 1981 | 2 | 0 |
| 1982 | 4 | 0 |
| 1983 | 4 | 0 |
| 1984 | 6 | 0 |
| 1985 | 10 | 0 |
| 1986 | 3 | 0 |
| 1987 | 7 | 0 |
| 1988 | 20 | 0 |
| 1989 | 28 | 0 |
| 1990 | 36 | 0 |
| 1991 | 38 | 0 |
| 1992 | 52 | 0 |
| 1993 | 34 | 0 |
| 1994 | 48 | 0 |
| 1995 | 44 | 0 |
| 1996 | 40 | 0 |
| 1997 | 38 | 0 |
| 1998 | 43 | 0 |
| 1999 | 48 | 0 |
| 2000 | 48 | 0 |
| 2001 | 47 | 20 |
| 2002 | 44 | 53 |
| 2003 | 42 | 103 |
| 2004 | 47 | 60 |
| 2005 | 44 | 41 |
| 2006 | 46 | 37 |
| 2007 | 30 | 62 |
| 2008 | 31 | 67 |
| 2009 | 41 | 52 |
| 2010 | 53 | 36 |
| 2011 | 52 | 41 |
| 2012 | 39 | 35 |
| 2013 | 39 | 38 |
| 2014 | 42 | 40 |
| 2015 | 41 | 51 |
| 2016 | 48 | 51 |
| 2017 | 58 | 37 |
| 2018 | 31 | 29 |
| 2019 | 42 | 37 |
| 2020 | 29 | 33 |
| 2021 | 26 | 34 |
| 2022 | 29 | 41 |
| 2023 | 33 | 44 |
| 2024 | 30 | 32 |
| 2025 | 20 | 63 |
| 2026 | 13 | 65 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Semiconductor fabrication process22 Sep 2026US 12,745,455 B2X-FAB France SAS
- Power device integration on a common substrate25 Aug 2026US 12,720,815 B2Silanna Asia Pte Ltd
- Device and method for inhibiting a substrate current in an IC semiconductor substrate25 Aug 2026US 12,720,829 B2Elmos Semiconductor AG
- Polysilicon resistor aligned between gate structures23 Jun 2026US 12,666,698 B2GLOBALFOUNDRIES U. S. Inc.
- Method for forming a crystalline protective polysilicon layer16 Jun 2026US 12,660,298 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor device having integrated planar mosfets and an integrated trench schottky barrier diode8 Oct 2026US 2026/0314038 A1Microchip Technology Incorporated
- Bipolar junction transistor co-integrated with nanosheet transistor1 Oct 2026US 2026/0304807 A1International Business Machines Corporation
- Bipolar junction transistors with nanosheet structures and methods for manufacturing the same1 Oct 2026US 2026/0304808 A1Tokyo Electron Limited
- Semiconductor device1 Oct 2026US 2026/0304828 A1Rohm Co., Ltd.
- Apparatus including fet and integrated sbd located inside of fet unit cell1 Oct 2026US 2026/0304916 A1Microchip Technology Incorporated
Most cited
By later US patents
- High density nanosheet diodes304US 9,842,835 B1International Business Machines Corporation · 2017
- Method of making an integrated circuit that combines multi-epitaxial power transistors with logic/analog devices197US 5,034,337 ATexas Instruments Incorporated · 1991
- Method for forming pseudo buried layer for sub-micron bipolar or BiCMOS device192US 5,856,003 ATaiwan Semiconductor Manufacturing Company.Ltd · 1999
- Semiconductor structure having two levels of buried regions185US 5,889,315 ANational Semiconductor Corporation · 1999
- Monolithic class D amplifier170US 5,973,368 A1999