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US 5,034,337 AGranted
Method of making an integrated circuit that combines multi-epitaxial power transistors with logic/analog devices
AssigneeTexas Instruments Incorporated
InventorsDan M. Mosher, Cornelia H. Blanton, Joe R. Trogolo, Larry Latham, David R. Cotton
Life of this patent
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Abstract
A process of fabricating semiconductor devices involving plural epitaxial layer growth steps.
Claims10
A method for forming a semiconductor device, comprising the steps of:
- providing a semiconductor substrate having an impurity concentration of a first conductivity type;
- epitaxially growing a first semiconductor layer of said first conductivity type on a surface of said semiconductor substrate;
- selectively doping an impurity of a second conductivity type in said first semiconductor layer, so as to form a first high concentration buried region of the second conductivity type;
- epitaxially growing a second semiconductor layer of said second semiconductivity type on a surface of said first semiconductor layer in which said high concentration buried layer is formed;
- epitaxially growing a third semiconductor layer of said first conductivity type on a surface of said second semiconductor layer in which said second and third high concentration buried layers are formed;
- and
- selectively diffusing impurities of said first and second conductivity type from a main surface of said third semiconductor layer so as to form high concentration diffusion regions suitable for formation of semiconductor wells and semiconductor active regions.
4 more elements
A method of forming a semiconductor device, comprising the steps:
- providing a semiconductor substrate having an impurity concentration of a first conductivity type;
- epitaxially growing a first semiconductor layer of said first conductivity type on a surface of said semiconductor substrate;
- epitaxially growing a second semiconductor layer of said second conductivity type on a surface of said first semiconductor layer;
- selectively doping an impurity of said first conductivity type in a surface of said second semiconductor layer to form at least two buried isolation regions for isolating and defining an area for formation of a first active device;
- selectively doping an impurity of a second conductivity type in a surface of said second semiconductor layer so as to form second and third high concentration buried regions of said second conductivity type;
- selectively doping an impurity of said first conductivity type in a surface of said second semiconductor layer so as to form a fourth high concentration buried region of said first conductivity type;
- epitaxially growing a third semiconductor layer of said first conductivity type on a surface of said second semiconductor layer in which said first, second, third and fourth high concentration buried layers are formed;
- selectively doping an impurity of said second conductivity type in a surface of said third semiconductor layer to form fifth and sixth high concentration buried regions of said second conductivity type to be in contact with said respective surfaces of said second and third high concentration buried regions;
- selectively diffusing impurities of said first and second conductivity type from a main surface of said third semiconductor layer so as to form high concentration diffusion regions suitable for formation of semiconductor wells and semiconductor active regions.
6 more elements
Dependencies are inferred from the claim text.