Polysilicon resistor aligned between gate structures
AssigneeGlobalFoundries U.S. Inc.
InventorsMarvin G. L. Montaque, Cathryn J. Christiansen, Craig B. Beucler, Timothy W. Kemerer
Life of this patent
Estimating the term…
Abstract
A structure includes a first gate structure spaced from a second gate structure in a field effect transistor (FET) area of a substrate. A polysilicon resistor is in a space between the first gate structure and the second gate structure. The polysilicon resistor has a lower surface that is farther from the substrate than lower surfaces of the polysilicon bodies of the first and second gate structures. The polysilicon resistor may have a different polarity dopant compared to at least one of the polysilicon bodies of the first and second gate structures.
Claims20
A structure, comprising:
- a first gate structure spaced from a second gate structure in a field effect transistor (FET) area of a substrate, the first and second gate structures each including a polysilicon body;
- and
- a polysilicon resistor in a space between the first gate structure and the second gate structure, wherein the polysilicon resistor has a lower surface that is farther from the substrate than lower surfaces of the polysilicon bodies of the first and second gate structures and wherein the polysilicon resistor is in a same polysilicon layer as a base of a bipolar junction transistor (BJT) in a bipolar junction transistor area of the substrate.
A structure, comprising:
- a field effect transistor (FET) area of a substrate including a first gate structure spaced from a second gate structure, wherein each of the first and second gate structures includes a polysilicon body having a lower surface;
- and
- a self-aligned polysilicon resistor in a space between the first gate structure and the second gate structure, wherein the self-aligned polysilicon resistor has a lower surface that is farther from the substrate than the lower surfaces of the polysilicon bodies of the first and second gate structures and wherein the polysilicon resistor is in a same polysilicon layer as a base of a bipolar junction transistor (BJT) in a bipolar junction transistor area of the substrate.
A method, comprising:
- forming a first gate structure spaced from a second gate structure over a field effect transistor (FET) area of a substrate;
- forming a first polysilicon layer over the first gate structure and the second gate structure and over a bipolar junction transistor area of the substrate, the first polysilicon layer filling a space between the first gate structure and the second gate structure;
- and
- using the first polysilicon layer, forming a polysilicon resistor in a space between the first gate structure and the second gate structure and forming a first portion of a bipolar junction transistor (BJT) in a bipolar junction transistor area of the substrate.
Dependencies are inferred from the claim text.