H03L 7/07
Using several loops
Official title: using several loops, e.g. for redundant clock signal generation
H03L7/07 (Using several loops) appears on 1,285 US grants and 959 published applications in this corpus.
Search patents in H03L- Granted patents
- 1,285
- Published applications
- 959
- Assignees
- 425
- Inventors
- 2,082
- Latest grant
- 25 Aug 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 3 | 0 |
| 1978 | 5 | 0 |
| 1979 | 1 | 0 |
| 1980 | 0 | 0 |
| 1981 | 2 | 0 |
| 1982 | 0 | 0 |
| 1983 | 1 | 0 |
| 1984 | 3 | 0 |
| 1985 | 2 | 0 |
| 1986 | 5 | 0 |
| 1987 | 4 | 0 |
| 1988 | 0 | 0 |
| 1989 | 6 | 0 |
| 1990 | 0 | 0 |
| 1991 | 7 | 0 |
| 1992 | 7 | 0 |
| 1993 | 6 | 0 |
| 1994 | 8 | 0 |
| 1995 | 5 | 0 |
| 1996 | 18 | 0 |
| 1997 | 16 | 0 |
| 1998 | 24 | 0 |
| 1999 | 28 | 0 |
| 2000 | 34 | 0 |
| 2001 | 42 | 21 |
| 2002 | 39 | 53 |
| 2003 | 41 | 52 |
| 2004 | 37 | 51 |
| 2005 | 48 | 56 |
| 2006 | 68 | 60 |
| 2007 | 55 | 52 |
| 2008 | 46 | 59 |
| 2009 | 54 | 54 |
| 2010 | 68 | 48 |
| 2011 | 61 | 41 |
| 2012 | 42 | 28 |
| 2013 | 39 | 27 |
| 2014 | 40 | 36 |
| 2015 | 33 | 32 |
| 2016 | 49 | 35 |
| 2017 | 39 | 15 |
| 2018 | 27 | 26 |
| 2019 | 44 | 31 |
| 2020 | 49 | 43 |
| 2021 | 52 | 45 |
| 2022 | 46 | 27 |
| 2023 | 29 | 25 |
| 2024 | 19 | 18 |
| 2025 | 25 | 15 |
| 2026 | 8 | 9 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Time-based converter apparatus and corresponding method25 Aug 2026US 12,719,351 B2STMicroelectronics International N. V.
- System and method for phase alignment between multiple phase-locked loops circuits26 May 2026US 12,640,741 B2Movandi Corporation
- Phase-locked loop circuit, phase error sign generator and RFIC19 May 2026US 12,633,933 B2Samsung Electronics Co., Ltd.
- Power efficient circuits and methods for phase alignment19 May 2026US 12,634,105 B2Rambus Inc.
- Pulse generation circuit14 Apr 2026US 12,603,653 B2Asahi Kasei Microdevices Corporation
- Device, system and methods for pll control24 Sep 2026US 2026/0291508 A1Microchip Technology Incorporated
- Chip with different types of resonators and related timing products27 Aug 2026US 2026/0254455 A1Skyworks Solutions, Inc.
- System and method for phase alignment between multiple phase-locked loops circuits20 Aug 2026US 2026/0246470 A1Movandi Corporation
- Digital phase-locked loops (pll) including closed-loop time-to-digital converter (tdc) gain calibration circuits and related methods16 Jul 2026US 2026/0205127 A1Microsoft Technology Licensing, LLC
- Multi-loop frequency translator with reduced area/power21 May 2026US 2026/0142662 A1Shaoxing Yuanfang Semiconductor Co., Ltd.
Most cited
By later US patents
- Method and circuitry for clock synchronization301US 5,485,490 ARambus Inc. · 1996
- Method and apparatus for frequency independent phase tracking of input signals in receiving systems and the like255US 5,038,115 A1991
- Delay-locked loop circuitry for clock delay adjustment248US 6,125,157 ARambus Inc. · 2000
- Method and system providing RF distribution for fixed wireless local loop service232US 6,014,546 ALGC Wireless, Inc. · 2000
- Method and system providing increased antenna functionality in a RF distribution system226US 5,983,070 ALGC Wireless, Inc. · 1999