G11C 7/225
Clock input buffers
Official title: {Clock input buffers}
G11C7/225 (Clock input buffers) appears on 503 US grants and 441 published applications in this corpus.
Search patents in G11C- Granted patents
- 503
- Published applications
- 441
- Assignees
- 95
- Inventors
- 648
- Latest grant
- 4 Aug 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1989 | 1 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 1 | 0 |
| 1994 | 1 | 0 |
| 1995 | 3 | 0 |
| 1996 | 4 | 0 |
| 1997 | 7 | 0 |
| 1998 | 12 | 0 |
| 1999 | 10 | 0 |
| 2000 | 24 | 0 |
| 2001 | 28 | 10 |
| 2002 | 25 | 20 |
| 2003 | 14 | 14 |
| 2004 | 15 | 7 |
| 2005 | 3 | 10 |
| 2006 | 11 | 12 |
| 2007 | 7 | 13 |
| 2008 | 6 | 18 |
| 2009 | 10 | 16 |
| 2010 | 13 | 14 |
| 2011 | 22 | 17 |
| 2012 | 10 | 9 |
| 2013 | 12 | 13 |
| 2014 | 14 | 10 |
| 2015 | 14 | 19 |
| 2016 | 14 | 7 |
| 2017 | 12 | 12 |
| 2018 | 14 | 16 |
| 2019 | 27 | 28 |
| 2020 | 27 | 29 |
| 2021 | 32 | 28 |
| 2022 | 20 | 27 |
| 2023 | 27 | 35 |
| 2024 | 28 | 27 |
| 2025 | 24 | 15 |
| 2026 | 11 | 15 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Adjustable delay propagation of a control signal to different page buffer driver groups4 Aug 2026US 12,700,439 B2Micron Technology, Inc.
- Memory system, operating method of the memory system, and interface circuit of the memory system30 Jun 2026US 12,670,939 B2Samsung Electronics Co., Ltd.
- Low power scheme for power down in integrated dual rail SRAMs16 Jun 2026US 12,658,221 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Method for operating a data processing system26 May 2026US 12,640,178 B2Robert Bosch GmbH
- Synchronous input buffer control using a ripple counter28 Apr 2026US 12,614,574 B2Micron Technology, Inc.
- Semiconductor integrated circuit device17 Sep 2026US 2026/0282879 A1Socionext Inc.
- Integrated circuit device including buffer circuit and operating method of integrated circuit device6 Aug 2026US 2026/0229264 A1SK hynix Inc.
- Dram interface mode with improved channel integrity and efficiency at high signaling rates23 Jul 2026US 2026/0212901 A1Rambus Inc.
- Clock Gating Circuitry2 Jul 2026US 2026/0188361 A1Micron Technology, Inc.
- Asymmetric Clock Gating Scheme2 Jul 2026US 2026/0188366 A1Micron Technology, Inc.
Most cited
By later US patents
- Apparatus for synchronously generating clock signals in a data processing system430US 5,243,703 ARambus Inc. · 1993
- Integrated circuit I/O using high performance bus interface325US 5,319,755 ARambus Inc. · 1994
- Memory circuitry having bus interface for receiving information in packets and access time registers282US 5,606,717 ARambus Inc. · 1997
- Memory module having memory devices containing internal device ID registers and method of initializing same261US 5,928,343 ARambus Inc. · 1999
- Integrated circuit I/O using a high performance bus interface214US 5,513,327 ARambus Inc. · 1996