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US 2026/0229264 A1Published application
Integrated circuit device including buffer circuit and operating method of integrated circuit device
AssigneeSK hynix Inc.
InventorsHan Byeol KWON, Kyu Young KIM, Min O KIM, Jung Taek YOU
Life of this patent
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Abstract
An integrated circuit device includes one or more input terminals, a buffer setting storage circuit configured to receive and store buffer setting information in response to a clock sync state signal, and one or more buffer circuits configured to be set based on the buffer setting information stored in the buffer setting storage circuit and configured to receive signals of the one or more input terminals, respectively.
Claims10
An integrated circuit device comprising:
- one or more input terminals;
- a buffer setting storage circuit configured to receive and store buffer setting information in response to a clock sync state signal;
- and
- one or more buffer circuits configured to be set based on the buffer setting information stored in the buffer setting storage circuit and configured to receive signals of the one or more input terminals, respectively.
1 more element
An operating method of an integrated circuit device, the operating method comprising:
- changing clock frequency setting information;
- decoding the clock frequency setting information and generating buffer setting information;
- transitioning from a clock sync-on state to a clock sync-off state;
- and
- applying the buffer setting information to one or more buffer circuits in response to the transitioning.
2 more elements
Dependencies are inferred from the claim text.