G11C 7/1084
Data input buffers
Official title: {Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load}
G11C7/1084 (Data input buffers) appears on 1,833 US grants and 1,773 published applications in this corpus.
Search patents in G11C- Granted patents
- 1,833
- Published applications
- 1,773
- Assignees
- 236
- Inventors
- 2,268
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1984 | 1 | 0 |
| 1985 | 0 | 0 |
| 1986 | 2 | 0 |
| 1987 | 1 | 0 |
| 1988 | 3 | 0 |
| 1989 | 5 | 0 |
| 1990 | 1 | 0 |
| 1991 | 4 | 0 |
| 1992 | 3 | 0 |
| 1993 | 5 | 0 |
| 1994 | 9 | 0 |
| 1995 | 4 | 0 |
| 1996 | 3 | 0 |
| 1997 | 5 | 0 |
| 1998 | 8 | 0 |
| 1999 | 5 | 0 |
| 2000 | 26 | 0 |
| 2001 | 32 | 9 |
| 2002 | 37 | 39 |
| 2003 | 28 | 38 |
| 2004 | 29 | 28 |
| 2005 | 25 | 34 |
| 2006 | 31 | 42 |
| 2007 | 29 | 46 |
| 2008 | 35 | 39 |
| 2009 | 45 | 55 |
| 2010 | 53 | 53 |
| 2011 | 46 | 33 |
| 2012 | 45 | 47 |
| 2013 | 43 | 39 |
| 2014 | 49 | 43 |
| 2015 | 51 | 60 |
| 2016 | 71 | 57 |
| 2017 | 77 | 67 |
| 2018 | 76 | 72 |
| 2019 | 98 | 116 |
| 2020 | 124 | 121 |
| 2021 | 136 | 146 |
| 2022 | 141 | 177 |
| 2023 | 150 | 180 |
| 2024 | 137 | 109 |
| 2025 | 116 | 78 |
| 2026 | 44 | 45 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Automatic adaptive signaling over a pin of an integrated circuit device6 Oct 2026US 12,755,767 B2Micron Technology, Inc.
- Device and method for reading data in memory29 Sep 2026US 12,749,514 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Memory system and data processing system including the same25 Aug 2026US 12,717,579 B2SK hynix Inc.
- Data receiving circuit, data receiving system and storage apparatus25 Aug 2026US 12,719,409 B2Changxin Memory Technologies, Inc.
- Reduction of charge injection noise in sense amplifiers of high-speed data interfaces25 Aug 2026US 12,719,413 B2Parade Technologies, Ltd.
- Buffer chip, semiconductor package including buffer chip and memory chip, memory module, and operation method of semiconductor package3 Sep 2026US 2026/0260676 A1SK hynix Inc.
- Non-volatile memory device having high i/o efficiency based on separate command address protocol, operation method thereof, and storage device including same20 Aug 2026US 2026/0244366 A1Samsung Electronics Co., Ltd.
- Semiconductor system and operating method thereof13 Aug 2026US 2026/0237414 A1National Tsing Hua University
- Adaptive memory management and control circuitry13 Aug 2026US 2026/0237432 A1Numem Inc.
- Integrated circuit device including buffer circuit and operating method of integrated circuit device6 Aug 2026US 2026/0229264 A1SK hynix Inc.
Most cited
By later US patents
- Integrated circuit I/O using high performance bus interface325US 5,319,755 ARambus Inc. · 1994
- Memory circuitry having bus interface for receiving information in packets and access time registers282US 5,606,717 ARambus Inc. · 1997
- Memory module having memory devices containing internal device ID registers and method of initializing same261US 5,928,343 ARambus Inc. · 1999
- Method and apparatus for receiving high speed signals with low latency243US 6,396,329 B1Rambus Inc. · 2002
- Low skew differential receiver with disable feature220US 6,256,234 B1Micron Technology, Inc. · 2001