G11C 7/10
Input/output [i/o] data interface arrangements
Official title: Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
G11C7/10 (Input/output [i/o] data interface arrangements) appears on 21,034 US grants and 18,337 published applications in this corpus.
Search patents in G11C- Granted patents
- 21,034
- Published applications
- 18,337
- Assignees
- 1,583
- Inventors
- 17,419
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 2 | 0 |
| 1977 | 1 | 0 |
| 1978 | 4 | 0 |
| 1979 | 1 | 0 |
| 1980 | 5 | 0 |
| 1981 | 2 | 0 |
| 1982 | 11 | 0 |
| 1983 | 7 | 0 |
| 1984 | 8 | 0 |
| 1985 | 11 | 0 |
| 1986 | 36 | 0 |
| 1987 | 53 | 0 |
| 1988 | 52 | 0 |
| 1989 | 95 | 0 |
| 1990 | 59 | 0 |
| 1991 | 80 | 0 |
| 1992 | 66 | 0 |
| 1993 | 118 | 0 |
| 1994 | 180 | 0 |
| 1995 | 178 | 0 |
| 1996 | 228 | 0 |
| 1997 | 273 | 0 |
| 1998 | 426 | 0 |
| 1999 | 445 | 0 |
| 2000 | 543 | 0 |
| 2001 | 607 | 223 |
| 2002 | 551 | 545 |
| 2003 | 479 | 569 |
| 2004 | 530 | 571 |
| 2005 | 443 | 602 |
| 2006 | 564 | 603 |
| 2007 | 536 | 677 |
| 2008 | 531 | 663 |
| 2009 | 531 | 645 |
| 2010 | 587 | 536 |
| 2011 | 587 | 464 |
| 2012 | 523 | 558 |
| 2013 | 540 | 593 |
| 2014 | 682 | 715 |
| 2015 | 729 | 721 |
| 2016 | 829 | 691 |
| 2017 | 840 | 763 |
| 2018 | 792 | 806 |
| 2019 | 989 | 1031 |
| 2020 | 1044 | 974 |
| 2021 | 983 | 1069 |
| 2022 | 979 | 1097 |
| 2023 | 1013 | 1152 |
| 2024 | 994 | 917 |
| 2025 | 854 | 683 |
| 2026 | 413 | 469 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
- G11C 7/1051Data output circuits7,939
- G11C 7/1078Data input circuits6,442
- G11C 7/1006Data managing5,719
- G11C 7/1015Read-write modes for single port memories, i.e. having either a random port5,183
- G11C 7/1072For memories with random access ports synchronised on clock signal pulse trains3,066
- G11C 7/1048Data bus control circuits1,749
- G11C 7/1075For multiport memories each having random access ports and serial ports1,029
- G11C 7/1003Interface circuits for daisy chain or ring bus memory arrangements106
Recent patents
- Method and system for supporting memory functions during low power modes of a portable computing device (PCD)6 Oct 2026US 12,754,599 B2QUALCOMM Incorporated
- Memory device, memory controller, and storage device including the same6 Oct 2026US 12,754,801 B2Samsung Electronics Co., Ltd.
- Apparatuses and methods for compute enabled cache6 Oct 2026US 12,754,849 B2
- Calibration devices and operating methods thereof6 Oct 2026US 12,755,766 B2Samsung Electronics Co., Ltd.
- Automatic adaptive signaling over a pin of an integrated circuit device6 Oct 2026US 12,755,767 B2Micron Technology, Inc.
- Memory device8 Oct 2026US 2026/0311733 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor memory device with processing-in-memory using test circuitry8 Oct 2026US 2026/0311790 A1Micron Technology, Inc.
- Memory shifting circuit8 Oct 2026US 2026/0311796 A1
- Methods and apparatus for eviction in dual datapath victim cache system1 Oct 2026US 2026/0300187 A1
- Semiconductor memory device1 Oct 2026US 2026/0301785 A1Kioxia Corporation
Most cited
By later US patents
- Output enable signal generation circuit of semiconductor memory1,017US 8,400,851 B2SK hynix Inc. · 2013
- Flash eeprom system602US 5,297,148 ASunDisk Corporation · 1994
- Signature filter system544US 4,944,036 A1990
- Flash EEprom system524US 5,602,987 ASanDisk Corporation · 1997
- Content addressable memory device471US 6,175,514 B1Fast-Chip, Inc. · 2001