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US 2026/0237432 A1Published application
Adaptive memory management and control circuitry
AssigneeNumem Inc.
InventorsEric Hall, Doug Smith, Nicholas T. Hendrickson, Jack Guedj
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Abstract
An adaptive memory management and control circuitry (AMMC) to provide extended test, performance, and power optimizing capabilities for a resistive memory is disclosed herein. In one embodiment, a resistive memory comprises a resistive memory array and an Adaptive Memory Management and Control circuitry (AMMC) that is coupled to the resistive memory array. The AMMC is configured with extended test, reliability, performance and power optimizing capabilities for the resistive memory.
Claims20
Resistive memory comprising:
- a resistive memory array;
- and
- an adaptive Memory Management and Control circuitry (AMMC) coupled to the resistive memory array, wherein the AMMC is configured with power optimizing capabilities by having a first region of the resistive memory array active and having a second region of the resistive memory in a low power mode.
A memory subsystem comprising:
- a resistive memory array coupled to the smart compute memory circuitry;
- and
- an Adaptive Memory Management and Control circuitry (AMMC) coupled to the resistive memory array, wherein the AMMC includes an integrated temperature control circuity and the AMMC is configured with adaptive power optimizing capabilities and performance optimizing capabilities over a temperate range.
Resistive memory comprising:
- a resistive memory array;
- and
- an adaptive Memory Management and Control circuitry (AMMC) coupled to the resistive memory array, wherein the AMMC is configured to adaptively adjust parameters including performance and power for different operating modes.
Dependencies are inferred from the claim text.