G11C 7/1021

Page serial bit line access mode, i.e. using an enabled row address

Official title: {Page serial bit line access mode, i.e. using an enabled row address stroke pulse with its associated word line address and a sequence of enabled column address stroke pulses each with its associated bit line address}

G11C7/1021 (Page serial bit line access mode, i.e. using an enabled row address) appears on 296 US grants and 183 published applications in this corpus.

Search patents in G11C
Granted patents
296
Published applications
183
Assignees
87
Inventors
337
Latest grant
9 Dec 2025

Filings by year

G11C 7/1021: granted patents and published applications per publication year
YearGranted patentsPublished applications
198610
198730
198820
198920
199030
199110
199220
199360
199450
199560
1996220
1997220
1998150
1999140
200050
2001107
200288
2003914
20041320
20051212
20062115
20071117
200888
2009118
2010126
201165
201275
201316
201475
201542
201686
201757
201848
201984
202034
202158
202241
202346
202451
202510

By publication year. Applications have been published since 2001.

Subgroups

Granted patents

Recent patents

Most cited

By later US patents