G11C 7/1021
Page serial bit line access mode, i.e. using an enabled row address
Official title: {Page serial bit line access mode, i.e. using an enabled row address stroke pulse with its associated word line address and a sequence of enabled column address stroke pulses each with its associated bit line address}
G11C7/1021 (Page serial bit line access mode, i.e. using an enabled row address) appears on 296 US grants and 183 published applications in this corpus.
Search patents in G11C- Granted patents
- 296
- Published applications
- 183
- Assignees
- 87
- Inventors
- 337
- Latest grant
- 9 Dec 2025
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1986 | 1 | 0 |
| 1987 | 3 | 0 |
| 1988 | 2 | 0 |
| 1989 | 2 | 0 |
| 1990 | 3 | 0 |
| 1991 | 1 | 0 |
| 1992 | 2 | 0 |
| 1993 | 6 | 0 |
| 1994 | 5 | 0 |
| 1995 | 6 | 0 |
| 1996 | 22 | 0 |
| 1997 | 22 | 0 |
| 1998 | 15 | 0 |
| 1999 | 14 | 0 |
| 2000 | 5 | 0 |
| 2001 | 10 | 7 |
| 2002 | 8 | 8 |
| 2003 | 9 | 14 |
| 2004 | 13 | 20 |
| 2005 | 12 | 12 |
| 2006 | 21 | 15 |
| 2007 | 11 | 17 |
| 2008 | 8 | 8 |
| 2009 | 11 | 8 |
| 2010 | 12 | 6 |
| 2011 | 6 | 5 |
| 2012 | 7 | 5 |
| 2013 | 1 | 6 |
| 2014 | 7 | 5 |
| 2015 | 4 | 2 |
| 2016 | 8 | 6 |
| 2017 | 5 | 7 |
| 2018 | 4 | 8 |
| 2019 | 8 | 4 |
| 2020 | 3 | 4 |
| 2021 | 5 | 8 |
| 2022 | 4 | 1 |
| 2023 | 4 | 6 |
| 2024 | 5 | 1 |
| 2025 | 1 | 0 |
By publication year. Applications have been published since 2001.
Subgroups
Granted patents
Recent patents
- Semiconductor memory systems with on-die data buffering9 Dec 2025US 12,493,568 B2Rambus Inc.
- SRAM design for energy efficient sequential access20 Aug 2024US 12,068,054 B2Meta Platforms Technologies, LLC
- Semiconductor memory systems with on-die data buffering16 Apr 2024US 11,960,418 B2Rambus Inc.
- Non-volatile memory device with concurrent bank operations2 Apr 2024US 11,948,629 B2Mosaid Technologies Incorporated
- Energy efficient memory array with optimized burst read and write data access20 Feb 2024US 11,908,542 B2Intel Corporation
- Semiconductor memory systems with on-die data buffering17 Oct 2024US 2024/0345971 A1Rambus Inc.
- Memory devices having special mode access19 Oct 2023US 2023/0335166 A1Micron Technology, Inc.
- Non-volatile memory device with concurrent bank operations10 Aug 2023US 2023/0253036 A1Mosaid Technologies Incorporated
- Computer device, setting method for memory module and mainboard6 Jul 2023US 2023/0215475 A1Giga-Byte Technology Co., Ltd.
- Semiconductor memory systems with on-die data buffering20 Apr 2023US 2023/0120661 A1Rambus Inc.
Most cited
By later US patents
- Access time speed-up circuit for a semiconductor memory device427US 5,398,213 ASamsung Electronics Co., Ltd. · 1995
- Synchronous memory device with dual page and burst mode operations275US 5,966,724 AMicron Technology, Inc. · 1999
- Burst EDO memory device178US 5,526,320 AMicron Technology, Inc. · 1996
- Distributed write data drivers for burst access memories151US 5,598,376 AMicron Technology, Inc. · 1997
- Method for determining a type of memory present in a system143US 6,804,760 B2Micron Technology, Inc. · 2004