G11C 29/70
Masking faults in memories by using spares or by reconfiguring
Official title: {Masking faults in memories by using spares or by reconfiguring}
G11C29/70 (Masking faults in memories by using spares or by reconfiguring) appears on 7,421 US grants and 5,627 published applications in this corpus.
Search patents in G11C- Granted patents
- 7,421
- Published applications
- 5,627
- Assignees
- 868
- Inventors
- 9,032
- Latest grant
- 22 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 8 | 0 |
| 1977 | 13 | 0 |
| 1978 | 11 | 0 |
| 1979 | 13 | 0 |
| 1980 | 10 | 0 |
| 1981 | 7 | 0 |
| 1982 | 16 | 0 |
| 1983 | 18 | 0 |
| 1984 | 41 | 0 |
| 1985 | 25 | 0 |
| 1986 | 44 | 0 |
| 1987 | 41 | 0 |
| 1988 | 39 | 0 |
| 1989 | 37 | 0 |
| 1990 | 32 | 0 |
| 1991 | 44 | 0 |
| 1992 | 54 | 0 |
| 1993 | 97 | 0 |
| 1994 | 127 | 0 |
| 1995 | 150 | 0 |
| 1996 | 204 | 0 |
| 1997 | 171 | 0 |
| 1998 | 235 | 0 |
| 1999 | 238 | 0 |
| 2000 | 227 | 0 |
| 2001 | 231 | 104 |
| 2002 | 238 | 234 |
| 2003 | 226 | 249 |
| 2004 | 232 | 259 |
| 2005 | 202 | 245 |
| 2006 | 226 | 227 |
| 2007 | 208 | 234 |
| 2008 | 213 | 224 |
| 2009 | 171 | 233 |
| 2010 | 201 | 199 |
| 2011 | 189 | 173 |
| 2012 | 172 | 184 |
| 2013 | 191 | 208 |
| 2014 | 239 | 232 |
| 2015 | 255 | 236 |
| 2016 | 268 | 235 |
| 2017 | 248 | 200 |
| 2018 | 197 | 197 |
| 2019 | 230 | 241 |
| 2020 | 227 | 254 |
| 2021 | 232 | 248 |
| 2022 | 237 | 257 |
| 2023 | 237 | 176 |
| 2024 | 206 | 190 |
| 2025 | 161 | 161 |
| 2026 | 82 | 227 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
- G11C 29/78Using programmable devices4,639
- G11C 29/76Using address translation or modifications1,731
- G11C 29/88With partially good memories850
- G11C 29/74Using duplex memories, i.e. using dual copies502
- G11C 29/72With optimized replacement algorithms458
- G11C 29/702By replacing auxiliary circuits218
- G11C 29/86In serial access memories87
Recent patents
- Apparatuses, systems, and methods for storing memory metadata22 Sep 2026US 12,744,104 B2Micron Technology, Inc.
- Partial array sparing in a memory22 Sep 2026US 12,744,105 B2International Business Machines Corporation
- Cycling replacement blocks based on a die wafer location15 Sep 2026US 12,738,341 B2Micron Technology, Inc.
- Lifetime mixed level non-volatile memory system8 Sep 2026US 12,731,638 B2Vervain, LLC
- System and method for memory bad block management25 Aug 2026US 12,717,492 B2Samsung Electronics Co., Ltd.
- Artificial intelligence engine array with redundant column8 Oct 2026US 2026/0311794 A1Xilinx, Inc.
- Memory shifting circuit8 Oct 2026US 2026/0311796 A1
- Memory device and memory system8 Oct 2026US 2026/0311797 A1SK hynix Inc.
- Memory device and operating method thereof1 Oct 2026US 2026/0300109 A1Samsung Electronics Co., Ltd.
- Data Output Path for a Memory with Double Redundancy1 Oct 2026US 2026/0301848 A1QUALCOMM Incorporated
Most cited
By later US patents
- Three dimensional structure memory1,560US 5,915,167 AElm Technology Corporation · 1999
- Scheme for information dispersal and reconstruction1,530US 5,485,474 APresident and Fellows of Harvard College · 1996
- System and a method for defining transforms of memory device addresses1,397US 6,366,995 B1Acuid Corporation Limited · 2002
- Multi-state memory1,008US 6,222,762 B1SanDisk Corporation · 2001
- Highly compact EPROM and flash EEPROM devices819US 5,095,344 A1992