G11C 29/72
With optimized replacement algorithms
Official title: {with optimized replacement algorithms}
G11C29/72 (With optimized replacement algorithms) appears on 458 US grants and 413 published applications in this corpus.
Search patents in G11C- Granted patents
- 458
- Published applications
- 413
- Assignees
- 136
- Inventors
- 735
- Latest grant
- 16 Jun 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1984 | 2 | 0 |
| 1985 | 0 | 0 |
| 1986 | 3 | 0 |
| 1987 | 1 | 0 |
| 1988 | 2 | 0 |
| 1989 | 1 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 1 | 0 |
| 1993 | 0 | 0 |
| 1994 | 4 | 0 |
| 1995 | 1 | 0 |
| 1996 | 3 | 0 |
| 1997 | 1 | 0 |
| 1998 | 6 | 0 |
| 1999 | 11 | 0 |
| 2000 | 14 | 0 |
| 2001 | 11 | 5 |
| 2002 | 14 | 21 |
| 2003 | 16 | 18 |
| 2004 | 17 | 19 |
| 2005 | 18 | 13 |
| 2006 | 15 | 21 |
| 2007 | 21 | 19 |
| 2008 | 19 | 19 |
| 2009 | 18 | 16 |
| 2010 | 13 | 7 |
| 2011 | 12 | 2 |
| 2012 | 7 | 4 |
| 2013 | 9 | 8 |
| 2014 | 7 | 2 |
| 2015 | 8 | 11 |
| 2016 | 5 | 4 |
| 2017 | 7 | 9 |
| 2018 | 15 | 16 |
| 2019 | 18 | 29 |
| 2020 | 21 | 37 |
| 2021 | 14 | 17 |
| 2022 | 34 | 37 |
| 2023 | 25 | 14 |
| 2024 | 31 | 28 |
| 2025 | 25 | 28 |
| 2026 | 8 | 9 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Methods and apparatus for eviction in dual datapath victim cache system16 Jun 2026US 12,657,134 B2Texas Instruments Incorporated
- Methods and apparatus for inflight data forwarding and invalidation of pending writes in store queue16 Jun 2026US 12,657,135 B2Texas Instruments Incorporated
- Methods and apparatus to facilitate read-modify-write support in a victim cache12 May 2026US 12,625,822 B2Texas Instruments Incorporated
- Memory processing method based on a server and apparatus, processor and electronic device21 Apr 2026US 12,609,176 B2Suzhou Metabrain Intelligent Technolog Y Co., Ltd.
- Runtime sparing for uncorrectable errors based on fault-aware analysis14 Apr 2026US 12,602,299 B2Intel Corporation
- Memory device and memory system8 Oct 2026US 2026/0311797 A1SK hynix Inc.
- Data Output Path for a Memory with Double Redundancy1 Oct 2026US 2026/0301848 A1QUALCOMM Incorporated
- In-memory repair information for a row subset23 Jul 2026US 2026/0211772 A1QUALCOMM Incorporated
- Reprogrammable Memory Repair18 Jun 2026US 2026/0171182 A1Google Inc.
- System and method for memristor crossbar array neural network with defective synaptics repair2 Apr 2026US 2026/0094663 A1
Most cited
By later US patents
- System and a method for defining transforms of memory device addresses1,397US 6,366,995 B1Acuid Corporation Limited · 2002
- Redundancy analysis for embedded memories with built-in self test and built-in self repair308US 6,067,262 ALSI Logic Corporation · 2000
- Fuseless memory repair system and method of operation121US 6,011,734 AMotorola, Inc. · 2000
- Method and apparatus for configurable build-in self-repairing of ASIC memories design120US 5,577,050 ALSI Logic Corporation · 1996
- Semiconductor device108US 9,805,783 B2Micron Technology, Inc. · 2017