G11C 11/40618
Refresh operations over multiple banks or interleaving
Official title: {Refresh operations over multiple banks or interleaving}
G11C11/40618 (Refresh operations over multiple banks or interleaving) appears on 926 US grants and 1,037 published applications in this corpus.
Search patents in G11C- Granted patents
- 926
- Published applications
- 1,037
- Assignees
- 141
- Inventors
- 1,098
- Latest grant
- 22 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1988 | 1 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 0 | 0 |
| 1994 | 0 | 0 |
| 1995 | 0 | 0 |
| 1996 | 2 | 0 |
| 1997 | 3 | 0 |
| 1998 | 3 | 0 |
| 1999 | 3 | 0 |
| 2000 | 2 | 0 |
| 2001 | 4 | 10 |
| 2002 | 11 | 12 |
| 2003 | 9 | 10 |
| 2004 | 11 | 16 |
| 2005 | 16 | 27 |
| 2006 | 22 | 31 |
| 2007 | 27 | 41 |
| 2008 | 27 | 40 |
| 2009 | 19 | 18 |
| 2010 | 17 | 17 |
| 2011 | 22 | 27 |
| 2012 | 25 | 31 |
| 2013 | 23 | 30 |
| 2014 | 35 | 35 |
| 2015 | 47 | 48 |
| 2016 | 47 | 51 |
| 2017 | 62 | 50 |
| 2018 | 46 | 40 |
| 2019 | 62 | 60 |
| 2020 | 62 | 63 |
| 2021 | 56 | 62 |
| 2022 | 44 | 55 |
| 2023 | 56 | 71 |
| 2024 | 70 | 82 |
| 2025 | 63 | 58 |
| 2026 | 29 | 52 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Semiconductor memory device performing refresh operation using multiple delay circuits22 Sep 2026US 12,744,073 B2Micron Technology, Inc.
- Adjusting refresh rate during self-refresh state15 Sep 2026US 12,738,309 B2Micron Technology, Inc.
- Memory device and method with two refresh cycles15 Sep 2026US 12,738,310 B2SK hynix Inc.
- Efficient coordination of error handling and usage-based-disturbance mitigation8 Sep 2026US 12,731,629 B2Micron Technology, Inc.
- Memory controller for memory with medium granularity refresh commands25 Aug 2026US 12,717,486 B2Advanced Micro Devices, Inc.
- Apparatuses and methods for controlling steal rates1 Oct 2026US 2026/0301792 A1Lodestar Licensing Group LLC
- Memory device having hidden refresh13 Aug 2026US 2026/0236165 A1Rambus Inc.
- Refresh command for multiple memory banks of multiple memory dies13 Aug 2026US 2026/0236168 A1Advanced Micro Devices, Inc.
- Refresh Latency Indication for Refresh Operations13 Aug 2026US 2026/0237417 A1Micron Technology, Inc.
- Processing-in-memory (pim) operation aware refresh scheduling13 Aug 2026US 2026/0237418 A1QUALCOMM Incorporated
Most cited
By later US patents
- Semiconductor memory device and method of operating same339US 7,085,156 B2Innovative Silicon S.A. · 2006
- Merging write cycles by comparing at least a portion of the respective write cycle addresses296US 6,356,485 B1Integrated Device Technology, Inc. · 2002
- Semiconductor memory device and method of operating same220US 7,733,693 B2Innovative Silicon ISi SA · 2010
- Integrated multichip memory module structure195US 5,502,667 AInternational Business Machines Corporation · 1996
- Integrated mulitchip memory module, structure and fabrication145US 5,702,984 AInternational Business Machines Corporation · 1997