G06F 7/503
Using carry switching, i.e. the incoming carry being connected directly, or only
Official title: using carry switching, i.e. the incoming carry being connected directly, or only via an inverter, to the carry output under control of a carry propagate signal
G06F7/503 (Using carry switching, i.e. the incoming carry being connected directly, or only) appears on 129 US grants and 44 published applications in this corpus.
Search patents in G06F- Granted patents
- 129
- Published applications
- 44
- Assignees
- 72
- Inventors
- 209
- Latest grant
- 9 Jun 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 1 | 0 |
| 1977 | 2 | 0 |
| 1978 | 1 | 0 |
| 1979 | 2 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 2 | 0 |
| 1983 | 3 | 0 |
| 1984 | 3 | 0 |
| 1985 | 3 | 0 |
| 1986 | 5 | 0 |
| 1987 | 3 | 0 |
| 1988 | 2 | 0 |
| 1989 | 7 | 0 |
| 1990 | 4 | 0 |
| 1991 | 1 | 0 |
| 1992 | 2 | 0 |
| 1993 | 3 | 0 |
| 1994 | 3 | 0 |
| 1995 | 2 | 0 |
| 1996 | 4 | 0 |
| 1997 | 3 | 0 |
| 1998 | 1 | 0 |
| 1999 | 4 | 0 |
| 2000 | 5 | 0 |
| 2001 | 6 | 0 |
| 2002 | 3 | 2 |
| 2003 | 2 | 1 |
| 2004 | 2 | 2 |
| 2005 | 0 | 3 |
| 2006 | 0 | 4 |
| 2007 | 4 | 0 |
| 2008 | 2 | 0 |
| 2009 | 2 | 1 |
| 2010 | 3 | 2 |
| 2011 | 2 | 1 |
| 2012 | 1 | 0 |
| 2013 | 0 | 0 |
| 2014 | 0 | 2 |
| 2015 | 0 | 0 |
| 2016 | 1 | 0 |
| 2017 | 1 | 0 |
| 2018 | 0 | 1 |
| 2019 | 1 | 6 |
| 2020 | 5 | 1 |
| 2021 | 2 | 4 |
| 2022 | 8 | 5 |
| 2023 | 4 | 4 |
| 2024 | 4 | 2 |
| 2025 | 6 | 0 |
| 2026 | 4 | 3 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
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- Asynchronous full-adder with majority or minority gates to generate sum true output13 Jan 2026US 12,524,205 B1Kepler Computing Inc.
- Adding LUT fracturabiliy to FPGA 4-LUTs using existing adder circuitry6 Jan 2026US 12,519,474 B2Efinix, Inc.
- Asynchronous carry-ripple adder with majority or minority gates25 Nov 2025US 12,481,481 B2Kepler Computing Inc.
- Control method and apparatus for non-volatile majority gate circuit and adder circuit based on memristors1 Oct 2026US 2026/0299883 A1Huazhong University of Science and Technology
- Computing device for low-power quarter round operation11 Jun 2026US 2026/0161397 A1Soteria Inc.
- Adding lut fracturabiliy to fpga 4-luts using existing adder circuitry9 Apr 2026US 2026/0100709 A1Efinix, Inc.
- Large number integer addition using vector accumulation26 Sep 2024US 2024/0319964 A1Advanced Micro Devices, Inc.
- Full adder circuit and multi-bit full adder7 Mar 2024US 2024/0078086 A1Zhejiang Lab
Most cited
By later US patents
- Logic structure and circuit for fast carry322US 5,349,250 AXilinx, Inc. · 1994
- Fast carry structure with synchronous input159US 5,546,018 AXilinx, Inc. · 1996
- Logic structure and circuit for fast carry138US 5,267,187 A1993
- High performance signal processor134US 4,791,590 ACornell Research Foundation, Inc. · 1988
- Digital processor system with conditional carry and status function in arithmetic unit97US 4,179,746 ATexas Instruments Incorporated · 1979