G06F 7/50
Adding
Official title: Adding; Subtracting (G06F7/483 - G06F7/491, G06F7/544 - G06F7/556 take precedence)
G06F7/50 (Adding) appears on 1,802 US grants and 1,313 published applications in this corpus.
Search patents in G06F- Granted patents
- 1,802
- Published applications
- 1,313
- Assignees
- 550
- Inventors
- 3,173
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 23 | 0 |
| 1977 | 6 | 0 |
| 1978 | 11 | 0 |
| 1979 | 15 | 0 |
| 1980 | 8 | 0 |
| 1981 | 6 | 0 |
| 1982 | 8 | 0 |
| 1983 | 7 | 0 |
| 1984 | 12 | 0 |
| 1985 | 18 | 0 |
| 1986 | 19 | 0 |
| 1987 | 21 | 0 |
| 1988 | 21 | 0 |
| 1989 | 38 | 0 |
| 1990 | 37 | 0 |
| 1991 | 28 | 0 |
| 1992 | 32 | 0 |
| 1993 | 33 | 0 |
| 1994 | 38 | 0 |
| 1995 | 29 | 0 |
| 1996 | 42 | 0 |
| 1997 | 42 | 0 |
| 1998 | 33 | 0 |
| 1999 | 58 | 0 |
| 2000 | 45 | 0 |
| 2001 | 61 | 15 |
| 2002 | 45 | 24 |
| 2003 | 46 | 53 |
| 2004 | 42 | 36 |
| 2005 | 21 | 33 |
| 2006 | 35 | 35 |
| 2007 | 36 | 20 |
| 2008 | 27 | 21 |
| 2009 | 28 | 24 |
| 2010 | 25 | 16 |
| 2011 | 19 | 20 |
| 2012 | 19 | 13 |
| 2013 | 26 | 17 |
| 2014 | 26 | 19 |
| 2015 | 12 | 16 |
| 2016 | 25 | 32 |
| 2017 | 36 | 31 |
| 2018 | 31 | 58 |
| 2019 | 49 | 80 |
| 2020 | 74 | 72 |
| 2021 | 46 | 105 |
| 2022 | 104 | 154 |
| 2023 | 103 | 124 |
| 2024 | 93 | 114 |
| 2025 | 95 | 117 |
| 2026 | 48 | 64 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Binary-weighted capacitor charge-sharing for multiplication6 Oct 2026US 12,754,713 B2Intel Corporation
- Neuromorphic device and electronic device including the same22 Sep 2026US 12,744,080 B2Samsung Electronics Co., Ltd.
- Syndrome decoding system15 Sep 2026US 12,737,257 B2Micron Technology, Inc.
- Machine learning hardware accelerator8 Sep 2026US 12,731,067 B2Texas Instruments Incorporated
- Efficient data compression in processing systems8 Sep 2026US 12,732,209 B2QUALCOMM Incorporated
- Number encoding for enhanced large language model (llm) numerical reasoning1 Oct 2026US 2026/0299882 A1International Business Machines Corporation
- Control method and apparatus for non-volatile majority gate circuit and adder circuit based on memristors1 Oct 2026US 2026/0299883 A1Huazhong University of Science and Technology
- Finite field operation device and memory system24 Sep 2026US 2026/0288417 A1Kioxia Corporation
- Processing core with operation suppression based on contribution estimate24 Sep 2026US 2026/0288487 A1Tenstorrent AI ULC
- Electro-Photonic Network For Machine Learning17 Sep 2026US 2026/0276886 A1Celestial AI Inc.
Most cited
By later US patents
- Logic structure and circuit for fast carry322US 5,349,250 AXilinx, Inc. · 1994
- Method and apparatus for designing circuits for wave pipelining258US 5,796,624 AThe Research Foundation of State University of New York · 1998
- Devices and methods with programmable logic and digital signal processing regions256US 6,538,470 B1Altera Corporation · 2003
- Adder/substractor for variable length numbers188US 4,707,800 ARaytheon Company · 1987
- Logic circuit and full adder using the same181US 6,700,405 B1Sony Corporation · 2004