G06F 30/34
For reconfigurable circuits
Official title: for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
G06F30/34 (For reconfigurable circuits) appears on 2,577 US grants and 1,765 published applications in this corpus.
Search patents in G06F- Granted patents
- 2,577
- Published applications
- 1,765
- Assignees
- 531
- Inventors
- 3,987
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1989 | 1 | 0 |
| 1990 | 1 | 0 |
| 1991 | 2 | 0 |
| 1992 | 4 | 0 |
| 1993 | 3 | 0 |
| 1994 | 5 | 0 |
| 1995 | 12 | 0 |
| 1996 | 17 | 0 |
| 1997 | 34 | 0 |
| 1998 | 33 | 0 |
| 1999 | 26 | 0 |
| 2000 | 27 | 0 |
| 2001 | 47 | 8 |
| 2002 | 45 | 21 |
| 2003 | 43 | 48 |
| 2004 | 35 | 37 |
| 2005 | 44 | 47 |
| 2006 | 100 | 54 |
| 2007 | 78 | 42 |
| 2008 | 88 | 48 |
| 2009 | 91 | 31 |
| 2010 | 96 | 42 |
| 2011 | 104 | 35 |
| 2012 | 104 | 41 |
| 2013 | 91 | 50 |
| 2014 | 131 | 74 |
| 2015 | 107 | 96 |
| 2016 | 101 | 66 |
| 2017 | 129 | 91 |
| 2018 | 99 | 116 |
| 2019 | 164 | 155 |
| 2020 | 168 | 116 |
| 2021 | 118 | 98 |
| 2022 | 119 | 138 |
| 2023 | 106 | 97 |
| 2024 | 78 | 100 |
| 2025 | 71 | 63 |
| 2026 | 55 | 51 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Compiling a tensor tiling specification to multi-dimensional data mover circuit configurations6 Oct 2026US 12,755,077 B2Xilinx, Inc.
- Real time analysis and control for a multiprocessor system29 Sep 2026US 12,748,682 B2HyperX Holdings LLC
- Balancing buffer insertion for clock H-trees22 Sep 2026US 12,743,573 B1Cadence Design Systems, Inc.
- Using quantum networks to distribute configurations in a distributed system22 Sep 2026US 12,743,643 B2International Business Machines Corporation
- Non-volatile programmable logic device based on multi-chip package15 Sep 2026US 12,737,520 B2iCometrue Company Ltd.
- System and method for mitigating interference of a wireless signal received and reflected at a reconfigurable metasurface unit cell array using a conditional generative adversarial network algorithm8 Oct 2026US 2026/0312630 A1Dell Products L. P.
- Circuit Implementation on Processing Circuitry10 Sep 2026US 2026/0268052 A1Altera Corporation
- Method for Computing a Circuit Simulation with Respect to a Driver3 Sep 2026US 2026/0260049 A1Microchip Technology Incorporated
- Programmable Matrix Switch Array for Reconfigurable Circuits27 Aug 2026US 2026/0252772 A1Board of Regents, The University of Texas System
- Integrated circuit operable in a plurality of different configurations20 Aug 2026US 2026/0244837 A1Cirrus Logic International Semiconductor Ltd.
Most cited
By later US patents
- Customizable and programmable cell array466US 6,819,136 B2eASIC Corporation · 2004
- Time multiplexed programmable logic device377US 5,646,545 AXilinx, Inc. · 1997
- Hierarchically connectable configurable cellular array365US 5,469,003 AXilinx, Inc. · 1995
- Pld connector for module having configuration of either first PLD or second PLD and reconfigurable bus for communication of two different bus protocols355US 5,535,342 AGiga Operations Corporation · 1996
- System and method for configuring an instrument to perform measurement functions utilizing conversion of graphical programs into hardware implementations336US 6,219,628 B1National Instruments Corporation · 2001