Compiling a tensor tiling specification to multi-dimensional data mover circuit configurations

A system, comprising:

• one or more hardware processors configured to initiate operations including:
• generating a first list of tile combination objects from a tensor tiling specification, wherein the first list specifies a sequence of tiles specified by the tensor tiling specification in which each tile combination object of the first list represents a single tile of a tensor data structure;
• generating a second list of tile combination objects by combining selected tile combination objects from the first list, wherein each tile combination object of the second list represents one or more tiles;
• converting the tile combination objects of the second list into buffer descriptor objects comprising buffer descriptor parameters;
• legalizing each of the buffer descriptor objects that is non-compliant with hardware constraints corresponding to a data mover circuit configurable using the buffer descriptor objects;
• and
• outputting the buffer descriptor objects, as legalized.

A computer program product comprising one or more computer readable storage mediums having program instructions embodied therewith, wherein the program instructions are executable by computer hardware to cause the computer hardware to initiate executable operations comprising:

• generating a first list of tile combination objects from a tensor tiling specification, wherein the first list specifies a sequence of tiles specified by the tensor tiling specification in which each tile combination object of the first list represents a single tile of a tensor data structure;
• generating a second list of tile combination objects by combining selected ones of the tile combination objects from the first list, wherein each tile combination object of the second list represents one or more tiles;
• converting the tile combination objects of the second list into buffer descriptor objects comprising buffer descriptor parameters;
• legalizing each of the buffer descriptor objects that is non-compliant with hardware constraints corresponding to a data mover circuit configurable using the buffer descriptor objects;
• and
• outputting the buffer descriptor objects, as legalized.