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US 6,819,136 B2Granted
Customizable and programmable cell array
AssigneeeASIC Corporation
InventorZvi Or-Bach
Life of this patent
Estimating the term…
Abstract
A personalizable and programmable integrated circuit device including at least first and second programmable logic cells and at least one permanent electrical conductive path interconnecting the at least first and second programmable logic cells for personalization of the integrated circuit device, wherein the at least first and second programmable logic cells are programmable by the application of an electrical signal thereto.
Claims56
A logic array comprising:
- an array of programmable cells having a multiplicity of inputs and a multiplicity of outputs;
- and
- customized interconnections providing permanent direct interconnections among at least a plurality of said multiplicity of inputs and at least a plurality of said multiplicity of outputs;
- wherein:
- at least some of said programmable cells are programmable by means of electrical signals supplied thereto;
- and
- at least some of said customized interconnections are customized by lithography.
4 more elements
A semiconductor device comprising:
- a logic array comprising a multiplicity of logic cells, said logic cells having a multiplicity of inputs and a multiplicity of outputs, each logic cell including at least one flip-flop and at least one inverter, said inverter having an inverter input and an inverter output, wherein said inverter input and inverter output are part of said multiplicity of inputs and multiplicity of outputs;
- said logic array also comprising at least one standard metal layer;
- and
- metal connection layers overlying said logic array for interconnecting various ones of said inputs and outputs in a customized manner.
1 more element
A semiconductor device comprising:
- a logic array comprising a multiplicity of cells said cells having at least one input and at least one output, each cell including at least one flip-flop;
- said logic array also comprising at least one standard metal layer;
- and
- metal connection layers overlying said logic array for interconnecting various inputs and outputs thereof in a customized manner, said metal connection layers comprising at least one custom via layer and at least one custom metal layer.
1 more element
A logic array comprising:
- an array of logic cells having a multiplicity of inputs and a multiplicity of outputs;
- at least first, second and third metal layers formed over said array of logic cells, said second metal layer comprising a plurality of generally parallel bands extending parallel to a first axis, each band comprising a multiplicity of second metal layer strips extending perpendicular to said first axis, and said first metal layer comprising a plurality of first metal layer strips extending perpendicular to a second axis;
- and
- at least one via connecting at least one second metal layer strip with said first metal layer, said first metal layer underlying said second metal layer;
- wherein said at least first, second and third metal layers are part of a set of customized interconnections providing permanent direct interconnections among at least a plurality of said multiplicity of inputs and at least a plurality of said multiplicity of outputs.
2 more elements
A semiconductor device comprising:
- a logic array comprising a multiplicity of logic cells, said logic cells having a multiplicity of inputs and a multiplicity of outputs, each logic cell including at least one flip-flop and at least one multiplexer, said logic array also comprising at least one standard metal layer;
- and
- metal connection layers overlying said logic array for interconnecting various inputs and outputs thereof in a customized manner;
- wherein at least one of said multiplexers is configured to perform a two-input logic function by said metal connection layers.
1 more element
A semiconductor device comprising:
- a logic array comprising a multiplicity of logic cells, said logic cells having a multiplicity of inputs and a multiplicity of outputs, each logic cell including at least one flip-flop, said logic array also comprising at least one standard metal layer;
- and
- metal connection layers overlying said logic array for interconnecting various inputs and outputs thereof in a customized manner;
- wherein at least one interconnection within said logic cell is made by said metal connection layers.
1 more element
Dependencies are inferred from the claim text.