Y10S 438/973
Substrate orientation
Y10S438/973 (Substrate orientation) appears on 151 US grants and 56 published applications in this corpus.
Search patents in Y10S- Granted patents
- 151
- Published applications
- 56
- Assignees
- 68
- Inventors
- 237
- Latest grant
- 30 Jun 2015
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 3 | 0 |
| 1977 | 0 | 0 |
| 1978 | 0 | 0 |
| 1979 | 2 | 0 |
| 1980 | 1 | 0 |
| 1981 | 3 | 0 |
| 1982 | 0 | 0 |
| 1983 | 1 | 0 |
| 1984 | 5 | 0 |
| 1985 | 1 | 0 |
| 1986 | 4 | 0 |
| 1987 | 4 | 0 |
| 1988 | 2 | 0 |
| 1989 | 0 | 0 |
| 1990 | 5 | 0 |
| 1991 | 2 | 0 |
| 1992 | 4 | 0 |
| 1993 | 5 | 0 |
| 1994 | 7 | 0 |
| 1995 | 5 | 0 |
| 1996 | 5 | 0 |
| 1997 | 6 | 0 |
| 1998 | 5 | 0 |
| 1999 | 12 | 0 |
| 2000 | 5 | 0 |
| 2001 | 5 | 1 |
| 2002 | 5 | 5 |
| 2003 | 4 | 3 |
| 2004 | 4 | 3 |
| 2005 | 2 | 5 |
| 2006 | 2 | 4 |
| 2007 | 6 | 7 |
| 2008 | 2 | 12 |
| 2009 | 7 | 5 |
| 2010 | 7 | 2 |
| 2011 | 7 | 4 |
| 2012 | 5 | 1 |
| 2013 | 4 | 2 |
| 2014 | 2 | 1 |
| 2015 | 2 | 1 |
By publication year. Applications have been published since 2001.
Recent patents
- Method of fabricating a semiconductor device30 Jun 2015US 9,070,604 B2Semiconductor Energy Laboratory Co.Ltd.
- Integrated circuits with aligned (100) NMOS and (110) PMOS finFET sidewall channels9 Jun 2015US 9,053,966 B2Texas Instruments Incorporated
- Plasma processing apparatus and plasma processing method11 Nov 2014US 8,883,025 B2Panasonic Corporation
- Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels28 Oct 2014US 8,872,220 B2Texas Instruments Incorporated
- Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels2 Apr 2013US 8,410,519 B2Texas Instruments Incorporated
- Integrated circuits with aligned (100) nmos and (110) pmos finfet sidewall channels15 Jan 2015US 2015/0014789 A1Texas Instruments Incorporated
- Integrated circuits with aligned (100) nmos and (110) pmos finfet sidewall channels6 Feb 2014US 2014/0035057 A1Texas Instruments Incorporated
- Plasma processing apparatus and plasma processing method21 Mar 2013US 2013/0068727 A1Panasonic Corporation
- Opto-electronic and electronic devices using an n-face or m-plane gallium nitride substrate prepared via ammonothermal growth17 Jan 2013US 2013/0015492 A1Japan Science and Technology Agency
- Integrated circuits with aligned (100) nmos and (110) pmos finfet sidewall channels12 Jul 2012US 2012/0175710 A1Texas Instruments Incorporated
Most cited
By later US patents
- Method of fabricating a high reliable SOI substrate218US 6,335,231 B12002
- Method of etching a trench into a semiconductor substrate204US 5,883,012 AMotorola, Inc. · 1999
- Monolithic integration of silicon and gallium arsenide devices178US 4,774,205 AMassachusetts Institute of Technology · 1988
- Semiconductor thin film and semiconductor device175US 6,087,679 ASemiconductor Energy Laboratory Co.Ltd. · 2000
- Method of fabricating a semiconductor device136US 6,803,264 B2Semiconductor Energy Laboratory Co.Ltd. · 2004