H10P 72/0466
Characterised by the construction of the load-lock chamber
Official title: {characterised by the construction of the load-lock chamber}
H10P72/0466 (Characterised by the construction of the load-lock chamber) appears on 936 US grants and 1,214 published applications in this corpus.
Search patents in H10P- Granted patents
- 936
- Published applications
- 1,214
- Assignees
- 218
- Inventors
- 2,137
- Latest grant
- 15 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 1 | 0 |
| 1977 | 0 | 0 |
| 1978 | 0 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 1 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 1 | 0 |
| 1987 | 1 | 0 |
| 1988 | 2 | 0 |
| 1989 | 4 | 0 |
| 1990 | 4 | 0 |
| 1991 | 5 | 0 |
| 1992 | 0 | 0 |
| 1993 | 4 | 0 |
| 1994 | 5 | 0 |
| 1995 | 4 | 0 |
| 1996 | 4 | 0 |
| 1997 | 1 | 0 |
| 1998 | 9 | 0 |
| 1999 | 12 | 0 |
| 2000 | 9 | 0 |
| 2001 | 14 | 10 |
| 2002 | 18 | 22 |
| 2003 | 15 | 23 |
| 2004 | 16 | 23 |
| 2005 | 16 | 24 |
| 2006 | 7 | 26 |
| 2007 | 11 | 40 |
| 2008 | 10 | 51 |
| 2009 | 9 | 40 |
| 2010 | 25 | 30 |
| 2011 | 20 | 37 |
| 2012 | 27 | 37 |
| 2013 | 27 | 45 |
| 2014 | 31 | 46 |
| 2015 | 38 | 35 |
| 2016 | 47 | 45 |
| 2017 | 40 | 72 |
| 2018 | 52 | 62 |
| 2019 | 62 | 54 |
| 2020 | 59 | 82 |
| 2021 | 55 | 68 |
| 2022 | 53 | 77 |
| 2023 | 53 | 82 |
| 2024 | 61 | 81 |
| 2025 | 65 | 59 |
| 2026 | 38 | 43 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Substrate processing apparatus, method of manufacturing semiconductor device and non-transitory computer-readable recording medium15 Sep 2026US 12,740,361 B2Kokusai Electric Corporation
- Substrate processing system and maintenance method8 Sep 2026US 12,733,432 B2Tokyo Electron Limited
- In-situ wafer stress measurement by chromatic confocal sensor scanning with temperature compensation25 Aug 2026US 12,716,713 B2Orbotech Ltd.
- Treatments to enhance material structures25 Aug 2026US 12,721,061 B2APPLIED Materials.Inc.
- In-situ wafer stress measurement by chromatic confocal sensor scanning with vibration compensation18 Aug 2026US 12,710,265 B2Orbotech Ltd.
- Heater plate with different emissivity for temperature uniformity17 Sep 2026US 2026/0282805 A1ASM IP Holding B. V.
- Gate valve27 Aug 2026US 2026/0251222 A1Hirata Corporation
- Processing method, method of manufacturing semiconductor device, processing apparatus, and recording medium20 Aug 2026US 2026/0247889 A1Kokusai Electric Corporation
- Method of Controlling Substrate Transfer System20 Aug 2026US 2026/0247914 A1Tokyo Electron Limited
- Substrate processing apparatus and substrate processing method6 Aug 2026US 2026/0231727 A1
Most cited
By later US patents
- Multi-chamber integrated process system988US 4,951,601 AAPPLIED Materials.Inc. · 1990
- Ultra high throughput wafer vacuum processing system973US 5,855,681 AAPPLIED Materials.Inc. · 1999
- Systems and methods for robotic transfer of workpieces between a storage area and a processing chamber658US 6,315,512 B1Mattson Technology, Inc. · 2001
- Multiple chamber integrated process system612US 5,882,165 AAPPLIED Materials.Inc. · 1999
- Apparatus for efficient removal of halogen residues from etched substrates558US 8,293,016 B2APPLIED Materials.Inc. · 2012